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TCP/IP stack design based on FPGA and embedded Ethernet W5500

With the development of network technology

WIZnet

Published March 27, 2023

694 UCC

229 VAR

Original source (new tab)

TCP/IP stack design based on FPGA and embedded Ethernet W5500

Components

Hardware components
W5500

WIZnet - W5500

x 1

WIZnet parts

Project description

INTRODUCTION
Through the design of the FPGA program to control W5500 as a server mode, waiting for the upper computer connection, after three successful connection handshake, can be used for TCP/IP protocol data transmission.
 
HOW TO USE

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The design of this system takes the lower computer (FPGA and W5500) as the server, and the upper computer USES the test software “TCP&UDP test tool” as the client.

To configure the program to the FPGA, first turn on the server mode of the lower computer and wait for the connection of the client.Then call to test the software, set up the IP address (that is, the server IP) and port number to connect to, establish the client and connect.After the connection is successful, the TCP/IP protocol transmission test will be started. The corresponding command data will be sent. After the server receives the command, the data will be analyzed, processed and controlled, and the result data will be sent back to the customer service end (PC end).

In the process of programming, the ChipScope function of ISE can be used to clearly observe the changes of each signal so as to test the correctness of the programming and find out the problems.The ChipScope is designed to capture data results online, and observe the relationship and changes between data and commands in real time.

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