User Created Content
MicroROS-Sub
MicroROS-Sub
jaden0
0
0
MicroROS-Pub
MicroROS-Pub
jaden0
1
0
esphome-p1
esphome-p1
jaden0
1
0
used by numerous heating systems).
ebusd - eBUS daemon
Sunny_0
1
0
The xfrpc project is an implementation of frp client written in C language for OpenWRT and IOT system. The main motivation of this project is to provide a light
xfrpc
Sunny_0
0
0
Finding the Easiest Products for W5500 and PoE Design
Finding the Easiest Products for W5500 and PoE Design
Alan0
4
0
This article illustrates the merits of MicroPython, its source structure, code execution flow and multiple supported hardware ports.
Embedded 101: MicroPython Execution Principles & Project Architecture Quick Overview
ruilixin60
3
0
This article covers MicroPython’s development timeline, introduces PyMite, and compares the differences between MicroPython and its derivative CircuitPython.
Embedded 101: MicroPython — Born in 6 Months by 27 Cambridge Undergraduates, Full History Guide
ruilixin60
3
0
This article introduces MicroPython, its distinctions from CPython, supported hardware platforms, .mpy precompiled bytecode, and the main differences in syntax,
【Hardcore Real Stuff】MicroPython vs CPython: Positioning, Syntax & Hardware Comparison
ruilixin60
3
0
This article introduces RP2040 Sysinfo identification registers, Syscfg system configuration registers and the simulation-only TBMan module.
Embedded 101: Unusable Registers in MCUs – TBMan Only Serves as Identifier
ruilixin60
5
0
This article introduces RP2040 GPIO pins, pin multiplexing function selection, external interrupts and configurable electrical parameters of IO pads.
Embedded 101: RP2040 GPIO Guide — Banks, Functions, Electrical Specs & Interrupts
ruilixin60
6
0
This article explains RP2040’s clock tree system, covering multiple clock sources, frequency configuration, independent gating and power-saving principles.
Disassembly of the RP2040 Clock Tree: Clock Sources, Generators and Peripheral Clocks
ruilixin60
6
0
This article introduces RP2040's power-on finite-state machine, its hardware sequential startup flow and controlled modules during chip power-up.
Embedded 101: MCU Power-Up State Machine Explained via RP2040
ruilixin60
6
0
This article explains two reset types of RP2040: full chip reset and independent subsystem peripheral reset, along with relevant reset signals.
Embedded 101: Two Types of MCU Resets — Full Chip Reboot vs Subsystem Reset
ruilixin60
6
0
Cyclone V FPGA에 구현한 2채널 디지털 락인 증폭기. 잡음 속 미약 신호의 크기·위상차를 실시간 측정해 W5500 TCP로 호스트 PC에 스트리밍합니다.
Digital Lock-in Amplifier on FPGA
irina0
7
0
This article introduces RP2040 low-power strategies to cut dynamic and static power, including clock gating, clock switching and DORMANT deep sleep mode.
Analysis of 20 MCU Low-Power Modes: Clock Gating, Power Gating, and Deep Sleep
ruilixin60
6
0
This article covers RP2040's on-chip core regulator, its adjustable voltage range, three operation modes, ROK indicator and configuration registers.
Embedded 101: RP2040 Core Voltage Regulator — Software Adjustable Modes for Low-Power Design
ruilixin60
5
0
This article introduces RP2040's multi-rail power supply system and several practical power supply wiring schemes.
Embedded 101: IOVDD, DVDD, AVDD — Why MCUs Require Multiple Power Rails
ruilixin60
5
0
This article introduces RP2040’s power-on boot sequence, covering hardware initialization and BootROM-driven Flash/USB boot modes.
Embedded 101: MCUs Don’t Run main() Immediately After Power-Up
ruilixin60
6
0
This article defines address mapping, register mapping and remapping, which establish address indexing rules for all internal chip resources.
Embedded 101: ROM, SRAM and Flash Functions on RP2040
ruilixin60
6
0
This article explains RP2040 DMA controller, its working modes, channel chaining, DREQ trigger mechanism and interrupt configuration.
From DREQ to Interrupt: A Full Analysis of the "Express Delivery System" of RP2040 DMA
ruilixin60
6
0
This article details the Cortex-M0+ core adopted by RP2040, including its main features, supporting modules and applicable embedded scenarios.
Embedded 101: Cortex-M0+ – Pipeline, Low Power & Cost-Effective MCU Core
ruilixin60
6
0
This article introduces RP2040's dual-core processor subsystem, covering SIO, interrupts, event signals and SWD debug architecture.
Embedded 101: Dual-Core Collaboration on RP2040 — SIO, Interrupts & Events
ruilixin60
6
0
This article explains RP2040's bus architecture and address mapping that govern internal data transmission and resource access.
What is 12 0x20000000? The Memory Management Logic Behind the RP2040 Address Map
ruilixin60
7
0