SynthesijerでDE0nanoにWIZ830MJを接続してみた

Components

Hardware components

Project description

The W5300 on the WIZ830MJ has an interface that is highly compatible with the processor, with control/status registers and packet storage memory mapped to the memory address space. If you're a legitimate Altera user, you're probably going to hang on to Nios II, but first (for me) I wrote a control circuit in Synthesijer. The control code is ↓. https://github.com/miyo/de0nano/blob/master/wiz830mj/WIZ830MJ_Test.java The W5300 I/F is equivalent to SRAM, so it can be mapped to a Java array, but the read/write methods are defined so that CS, WR, and RD delays can be appropriately emulated. By the…

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