w5500 no PHY

Question

Hi I am designing a custom POE Ethernet board using w5500. The connections with the mcu are working fine. I can read and write to w5500 with SPI. Here are the schematics and PCB Schematics.pdf (139.7 KB) PCB.pdf (158.6 KB) I am using the wiznet io driver. After init when I read the PHYCFGR I get 0xBA If I try to manually set the mode, I can see the PHYCFGR bits are properly set. The Duplex Status and Speed Status bits are also set to what I set manually. But the link bit is always 0. I have tried all combinations of OPMDC with no luck From the schematics, only changes I made was, I didnt have a 22uF cap (C1) so I added 2 10uF caps in parallel I didnt have any ferrite bead with me, so for L1, I got one off of an Arduino ethernet board. resistance measured 30Ohms on that one On the switch, I can see port LED pulsing. Does anyone see any obvious mistakes I have made with the design? The POE part is working as expected. The RJ45 jack is HY931147C from Hanrun with magnetics. I do not have any damping resistors. The 49R9 are 1%, 12.4K resistor is also 1% Thank you in advance

Eugeny · Answer

Hope you solved the issue, but anyway: broncha: On the switch, I can see port LED pulsing. Please clarify about ‘pulsing’: does it mean link performs continuous up-downs, or there’s traffic going on? Log into the switch and check its logs to see what is going on the port. As a brainstorming: you do not have chip reset after power up, reset input is pulled up to Vcc. Try resetting chip after it is powered according to the 5.5.1 of the datasheet. This may be important for the PHY operation. I am not sure but seems you may have confused TD and RD + and - connections to the jack. Another issue I see that you have pulled pin 23 to ground according to datasheet version 1.0.9. As well as other RSVD pins, but reference schematic have these pins floating. I suspect reference schematic is out of date (dated Sep 25, 2015), therefore you may be ok here.

broncha · Answer

Thanks for replying! The project has somewhat been stagnant, but yes I hardwired the reset pin. I will work on the new board design and check again. I am not sure but seems you may have confused TD and RD + and - connections to the jack. 1169×827 122 KB This schematic here shows, pin 2 is RX- and pin 1 is RX+ pin 6 is TX- and pin 5 is TX+ (same as in my schematics) Also pin 23 is grounded through a 10k resistor ( new datasheet says “23 RSVD Pull-down It must be tied to GND.”) But Ill test with new boards with the reset pin connected co mc and reset after power up.