W5500 layout

Question

Hello there, I’m working on a small device incorporating a W5500 for ethernet, and having never handled ethernet interfaces before, I’m looking for some feedback on the physical layout of the signal traces. This is what I have at the moment: The bottom layer (blue) is all ground plane, the top plane around the pairs is 3V3A. I’m particularly unsure about the capacitor on the RX pair (at the bottom), and would appreciate feedback. Thanks!

wiznetmuseum · Answer

which is capacitor and resistor? i can not distinguish on your brd file. check the reference schematic of WIZnet’s WiKi wizwiki.net/wiki/doku.php?id=pro … fschematic

Monkeh · Answer

[quote=“herosmirr”]check the reference schematic of WIZnet’s WiKi wizwiki.net/wiki/doku.php?id=pro … fschematic[/quote] I’ve followed the reference schematic… I’m asking for layout advice.

Monkeh · Answer

[quote=“herosmirr”]which is capacitor and resistor? i can not distinguish on your brd file.[/quote] It should be fairly clear from the very schematic you linked to… The silkscreen is turned off as I haven’t cleaned it up yet.

wiznetmuseum · Answer

in your brd, arrow of orange color is pin1 of W5500. right? could you explain what is the pin (box of orange color)? we recommend designed 4-layers PCB. but if you must make 2 layer PCB, i think that “the top plane around the pairs is 3V3A” is not good. make top plane have ground too, like bottom. 684×674 120 KB

Monkeh · Answer

[quote=“herosmirr”]in your brd, arrow of orange color is pin1 of W5500. right? could you explain what is the pin (box of orange color)?[/quote] Yes. That’s the RX centertap. we recommend designed 4-layers PCB. Not an option, cannot make 4 layer boards with the software to hand. [quote]but if you must make 2 layer PCB, i think that “the top plane around the pairs is 3V3A” is not good. make it ground plane, too.[/quote] All right, that’s doable. Any other comments? Cheers.

Editor1979 · Answer

I am looking for a good layout for this entire chip. Resistor, capacitor, and ethernet port values and the best placement on a dual-layer board. I am using a SI-50170 Ethernet port with LEDs. Any help would be greatly appreciated. I’d hate to make 1000 boards with this chip just to find I screwed something up.