Wiz812mj spi interface is erratic
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RE: Wiz812mj spi interface is erratic
by wiznetmuseum ·
hey, Wiggum23.
i can know your problem.
WIZ812MJ Used WIZnet’s W5100 chip.
on the datasheet of W5100, address 0420-0421 can’t write.
the register must use reading.
you says “I can do a successful write/read cycle to many registers, but not all.”,
i think it is you can’t check W5100’s datasheet or register’s character.
i hope this reply is helpful to you.
RE: Wiz812mj spi interface is erratic
by WIGGUM23 ·
Many thanks for your replies,
I made a simple mistake.
I still couldn’t write/read to 0x0424 ( S0_TX_WR ) then I found this on another forum :-
“Looks like the Sn_TX_WR only gets updated AFTER a successful SEND! You’ll have to keep track of all the writes to the TX buffer and write the TOTAL bytes to send in the Sn_TX_WR register, perform the Send and then Sn_TX_WR can be read and will have the updated value in it.”
I am now getting good results but I think this should be added to the datasheet as soon as possible.
Best Regards Mike.