W7500 SPI Slave Chip Select

Question

Hi forum, I want to use SSP0 in SPI slave mode on a W7500 and I noticed a strange behavior. It seems after transferring DSS Bits (8 Bits in my example), you have to toggle the Chip Select Pin (SSEL0) otherwise the other bits are not read into the RX Fifo. Attached you can find a minimal example I run on a WIZwiki-W7500ECO. I am configuring SPP0 as SPI slave and SPP1 as SPI master. The SPI Pins are connected together (PB5<->PB15, PB6<->PB16, PB7<->PB17, PB8<->PB18). I fill the master’s TX Fifo with 8 Bytes but my slave only receives the first on in its RX Fifo. w7500-spi-test.zip (105,2 KB) Here is my SPI configuration: /* SPI configuration */ SSP_StructInit(&SSPx_InitStructure); SSPx_InitStructure.SSP_DataSize = SSP_DataSize_8b; SSPx_InitStructure.SSP_Mode = SSP_Mode_Slave; SSP_Init(SSP0, &SSPx_InitStructure); Here is the UART output: Sending 8 Bytes... Done! SSP0->SR: 0x00000007 You sent 1 bytes to me. vals[0] = 00000022 How do I have to configure my SSP0, so the Chip Select can be low for multiple byte transfers? Can you please help me here? Best regards, Johannes

johannes4linux · Answer

Ok, I found the fix. The following issue in the pico-sdk pointed me in the right direction and here I found the fix. I had to adjust the initialization of my SSP0 as following: SSPx_InitStructure.SSP_Mode = SSP_Mode_Slave; SSPx_InitStructure.SSP_CPOL = SSP_CPOL_High; SSPx_InitStructure.SSP_CPHA = SSP_CPHA_2Edge; SSP_Init(SSP0, &SSPx_InitStructure); Now the RX Fifo fills up correctly and with just one long Low Phase of my CS I can receive all eight bytes. BR, Johannes