w5500 - SPI issue reading registers
Ethernet Chips
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RE: w5500 - SPI issue reading registers
by sarah.dellanno ·
I have realized the CS is resetting early which is being controlled by the master. Would this master spi setting be specific to my MCU or is there a general recommended setup for the master?
RE: RE: w5500 - SPI issue reading registers
by Eugeny ·
Not sure I get your question. There’s standard specification for the SPI, as well as some details in the datasheet, e.g.
therefore, logically, you must wait a little after last falling edge before deactivating the chip select. How long you wait - depends on the clock speed and properties of the SPI bus - your goal is to have reliable start and finish of the SPI communication.
RE: w5500 - SPI issue reading registers
by cq td ·
Hi Eugeny,
I have the same problem,and there is enough time(a few microseconds)after last falling edge before deactivating the chip select.
Regardless of reading any register, W5500 response: 0x01 0x02 0x03 0x00 0x00 …,Are there other possible reasons?
RE: w5500 - SPI issue reading registers
by Eugeny ·
This means data you read is 0x01 0x02 0x03 0x00 0x00 … If you have problem, please create new thread and expain the problem.