Time Between SPI Cycles
Ethernet Chips
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Ethernet Chips
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RE: Time Between SPI Cycles
by irina WIZnet ·
The minimum time or between /CS high and next /CS low is 32ns.
I think you can see in page 65 of datasheet :
RE: RE: Time Between SPI Cycles
by MadScientist ·
My 1.1.6 version of the datasheet did not have this specified, and I would have been referring to the SPI section anyway.
Thank you for your response Irina!