W5500 resets when >40ms between SPI transfers
Ethernet Chips
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Ethernet Chips
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RE: W5500 resets when >40ms between SPI transfers
by Eugeny ·
How did you know that it is being “reset”? All values in all registers (including common - own IP address, mask, GW) are being reset to default (see datasheet)?
What exactly do you find out? No link?
What state sockets are in? What issues you face if continue in the current state?
RE: W5500 resets when >40ms between SPI transfers
by Vittorio Pascucci ·
Hello Eugeny,
Sorry for the late reply. Before we even talk about sockets, reading PHYCFGR normally returns “10111111” when everything is working fine. When the issue appears PHYCFGR is first “10111010” for some time (so link off and half duplex) and then “10111110” for a few us (so only link off) and then it recovers normal operation. I can see the link is truly off because the green led on the ethernet connector is switching off.
This doesn’t happen if I implement the aforementioned workaround of polling the status register or the PHYCFGR continuously as a form of “keepalive”.
I will see what the sockets return and come back to you, but I think this is already enough to say that there is some kind of issue.
RE: RE: W5500 resets when >40ms between SPI transfers
by Eugeny ·
If you see link LED off and on then there’s hardware/connectivity issue. Recheck your circuit (connections, component values), change physical port on the switch.
RE: W5500 resets when >40ms between SPI transfers
by Vittorio Pascucci ·
Hello Eugeny,
Cable and switch are fine. The circuit of course could be an issue, I am using an arduino ethernet shield 2 but I modified it quite a bit.
Strange that the issue only occurs when I am not communicating through SPI. My workaround works perfectly, so it is hard to find a hardware failure that matches my observations. I will monitor VCC as well as the reset output from the voltage controller on board, maybe a small brown-out or an interference is triggering a reset.
RE: RE: W5500 resets when >40ms between SPI transfers
by Eugeny ·
Ensure you do not accidentally write to PHYCFGR resetting PHY.