W5500 strange behaviour of interrupts
Ethernet Chips
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RE: W5500 strange behaviour of interrupts
by irina WIZnet ·
IMR , Sn_IMR , and SIMR are related to the activation of the interrupt pin.
IR <->IMR, Sn_IMR<-> Sn_IR, SIMR <->SIR are the corresponding values of the bits.
For example,
When a bit of IMR is ‘1’ and the corresponding bit of IR is ‘1’, an interrupt Pin will be issued. In other words, if a bit of IMR is ‘0’, an interrupt pin will not be issued even if the corresponding bit of IR is ‘1’.
Therefore, the IMR value indicates whether the Interrupt pin is activated, and even if the IMR value is ‘0’, it doesn’t affect the IR value becoming ‘1’. Other values do the same.
RE: RE: W5500 strange behaviour of interrupts
by Krzysztof ·
Dear Irina,
Thank you for your answer. It’s behaviour according the documentation.
But in my case (TCP client on socket 0) when I’m set Sn_IMR (SendOK IR) the interrupt was generated from IR reg[0x0015] bit 5 [PPPoE] when the some data was send from Wiznet. Weirder IR_mask is disabled.
RE: W5500 strange behaviour of interrupts
by irina WIZnet ·
Could you please tell me the value that bit ‘3’ of MR register(0x0000)?
I think that the bit is enabled.
RE: W5500 strange behaviour of interrupts
by Krzysztof ·
Of course,
I put debug printf on main while loop:
UART_Printf(“\nMR reg 0x%02X”, getMR());
From terminal:
MR reg 0x00