Datasheet W5500 addresses

Question

Confusing regarding W5500 addresses in W5500 datasheet (ver 1.0.7) ? In page 20/66 , N-Bytes WRITE Access Example . How to determine the Offset Address = 0x0040 for the socket 1’s TX Buffer ? I know BSB[4:0] = ‘00110’ coming from page 28/66 , 00110(0x06) – Socket 1 TX Buffer . Just confuse about getting the address phase – 0x0040 ? Second question . For gateway address is the address phase = 0x0001 and the bsb[4:0] = 00000 for GAR0. For GAR1 would be – address phase = 0x0002 and the bsb[4:0] = 00000 , so on for rest gar register . Could we send continues like writing GAR address → address phase = 0x0001 , { bsb[4:0]=00000, R/W=1, gar0 data = 0x00, gar1 data = 0x01, gar2 data = 0x02 and gar3 data = 0x03 } following page 14/66 , Figure 7 spi format ? First time using W5500 , hope u guys could answer the question ?

Eugeny · Answer

This official site fetches datasheet version 1.0.6. This one, while saying it would provide version 1.0.8, provides version 1.0.7. I am already confused NewUser: Just confuse about getting the address phase – 0x0040 If you look at the figure 10 at page 20 there’s clear explanation how starting address is indicated - it is given in the “address phase”, and 0000_0000_0100_0000 is exactly binary representation of 0x0040. NewUser: I know BSB[4:0] = ‘00110’ coming from page 28/66 , 00110(0x06) – Socket 1 TX Buffer . But in general you can consider BSB field is a part of the address, because these bits select target access area. Does it answer your question? NewUser: Second question . For gateway address is the address phase = 0x0001 and the bsb[4:0] = 00000 for GAR0. For GAR1 would be – address phase = 0x0002 and the bsb[4:0] = 00000 , so on for rest gar register . Seems you are confused by the word phase. This word has meaning in the scope of the SPI access request to the W5500 (see figure 7 on page 14), and is not applicable when you talk about just addressing the specific register. Thus GAR0 addressing must be: address=0x0001 and BSB=0b00000; but if you want to read GAR0 using SPI frame, you must supply address 0x0001 within SPI frame’s address phase, and BSB in SPI control phase. NewUser: Could we send continues like writing GAR address -> address phase = 0x0001 , { bsb[4:0]=00000, R/W=1, gar0 data = 0x00, gar1 data = 0x01, gar2 data = 0x02 and gar3 data = 0x03 } following page 14/66 , Figure 7 spi format ? It should work this way if you select respective OP mode in the control phase of SPI request (I do not see you mentioning it above).

NewUser · Answer

Hello Eugeny. Got some forum question regarding flow from user Shade (TCP Server with W5500 - #22 by NewUser). This is related to w5500 Update ? 3.7.4 Write Data Size to S0_RX_RD to Update. 3.7.5 Write S0_CR = 0x40 (RECV) to Notify W5500. Based on the flow . May I know from "3.7.4 Write Data Size to S0_RX_RD to Update " . Do we write back the value of data size from " 3.7.1 Read S0_RX_RSR to Get the RX Buffer Data Size " to S0_RX_RD to Update ? Update means what for w5500 ? And why we nee to to "3.7.5 Write S0_CR = 0x40 (RECV) to Notify W5500 " ? Isnt the S0_CR (RECV) interrupted when interrupted cause by established connection ? Hope u could help to explain ?