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Published March 08, 2024 ©

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pocsagGW

SX1278 and ESP32 based POCSAG gateway

COMPONENTS Hardware components

WIZnet - W5500

x 1


PROJECT DESCRIPTION

pocsagGW

SX1278 and ESP32 based POCSAG gateway

Features

  • uses Semtech SX1278 as FSK receiver
  • also works with Semtech SX1276
  • uses W5500 Ethernet transceiver
  • receives 1200 bps, 4500 Hz shift POCSAG messages
  • serial console logging of received messages
  • serial console Command Line Interface for configuration and debugging
  • telnet server Command Line Interface for configuration and debugging
  • 3 levels of debugging
  • write/read configuration to/from flash
  • german BOS mode and DAU filter
  • german ASCII codes
  • decoding of ROT1 encoded messages
  • Ethernet based http gateway to forwarding the messages
  • error correction by BCH decoding

GPIO SX1278 (SPI)

  • GPIO 12 - MISO
  • GPIO 13 - MOSI
  • GPIO 14 - SCLK
  • GPIO 15 - CS

other SX1278 connections

  • GPIO 25 - RESET
  • GPIO 26 - DIO0
  • GPIO 27 - DIO1
  • GPIO 32 - DIO2
  • GPIO 33 - DIO3 (for future development)

GPIO W5500 (SPI)

  • GPIO 23 - MOSI
  • GPIO 19 - MISO
  • GPIO 18 - CLK
  • GPIO 5 - CS

Development Hardware

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Console Screenshot (DAPNET DB0HBO)

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Receiver Configuration

  • center frequency in MHz and Rx error offset frequency in kHz
    • the Rx error offset is the measured AFC value when Rx error offset is set to 0
  • bitrate in kbps (e.g. 1.2 for 1200 bps)
  • frequency shift in kHz
    • this means the single sided shift (e.g. 4.5 for +/- 4500 Hz)
  • Rx bandwidth in kHz (choose the next larger value from table in SX1278.h)
    • this means the single sided bandwidth
    • calculation: RXbandwidth >= Fshift+(bitrate/2)
    • the auto function uses the above formula
  • AFC bandwidth in kHz (choose the next larger value from table in SX1278.h)
    • calculation: AFCbandwidth >= 2*(Fshift+(bitrate/2))+Ferror
    • Ferror means the maximum center frequency offset error of the SX1278 module
    • the auto function uses the above formula
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