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Published April 23, 2024 ©

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KianV RV32IMA SV32 zicntr Linux SoC

KianV RV32IMA SV32 zicntr Linux SoC

COMPONENTS
PROJECT DESCRIPTION

This project specifically involves the KianV multi-cycle microcontroller with RV32IMA architecture and SV32 virtual memory management, as detailed under the linux_socs directory of the repository.

Project Overview

  • KianV RISC-V Harris Edition (SOC): This is an implementation of a Linux-capable RISC-V SoC. The project uses the RISC-V instruction set (specifically the RV32IMA variant which includes integer, multiplication, and atomic instructions) and supports SV32 virtual memory.
  • Linux Integration: The SoC is designed to run Linux, utilizing the MMU (Memory Management Unit) for virtual memory handling which is essential for running a full-featured Linux system.
  • Hardware and Simulation Details: The repository includes details and files for hardware design and simulation. It features a comprehensive setup for developing and testing the SoC in Verilog and SystemVerilog, which are used for hardware description.

Usage of W5500

The W5500 chip is used in this project as an Ethernet controller, providing TCP/IP capabilities to the microcontroller. This allows the KianV SoC to connect to the Internet or other networked devices, which is crucial for many IoT applications and for scenarios where remote access to the SoC is necessary. The W5500 helps in managing network communications efficiently, offloading these tasks from the RISC-V processor to maintain performance for other operations.

Technical Implementation

  • Virtual Memory Support: The SV32 mode in the RISC-V architecture is utilized here to implement virtual memory, an important feature for any modern OS like Linux.
  • Modular Design: The project is modular, with different components such as the memory controller, CPU core, and Ethernet controller (using the W5500) being integrated.
  • Simulation and Testing: The project includes simulation files for testing the SoC in a controlled environment before actual hardware implementation.

This repository is a rich resource for anyone interested in SoC design using RISC-V, providing real-world applications of theoretical knowledge in system design and network communication​

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