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Published May 13, 2025 © Apache License 2.0 (Apache-2.0)

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The Introduction of W55MH32 and Evaluation Board

The Introduction of W55MH32 and Evaluation Board

COMPONENTS
PROJECT DESCRIPTION

1 Chip Introduction

1.1 Introduction

The W55MH32 is a high-performance Ethernet microcontroller newly launched by WIZnet. It employs a high-performance Arm® Cortex-M3 core with a maximum main frequency of 216MHz, and has 1024KB of FLASH and 96KB of SRAM built-in. Particularly notably, it is equipped with the WIZnet TCP/IP offload engine (TOE), integrates a full-hardware TCP/IP protocol stack, MAC and PHY, and is also provided with an independent 32KB Ethernet transceiver cache for use by 8 hardware sockets. It is a genuine All-in-One solution.

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1.2 System Framework

The W55MH32 chip supports a rich variety of external interfaces, including GPIO, ADC, UART, SPI, I2S, I2C, SDIO, etc., which makes it convenient for connection and interaction with sensors, actuators and other peripheral devices. These features make the W55MH32 chip suitable for various application scenarios that require efficient network communication and data processing, such as smart homes, industrial automation, smart grids, etc.

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1.3 Resource

  • Packaging
  •  32-bit Arm Cortex-M3 core with a maximum main frequency of 216MHz
  • 1024KB FLASH96KB SRAM
  • 3 12-bit ADCs and 2 12-bit DACs
  • 12-channel DMA controller
  • 10/100 Mbps Ethernet MAC and PHY
  • Up to 66 multi-functional bidirectional I/O ports, all of which can be mapped to 16 external interrupts.

● 17 timers

○ 10 general-purpose timers

○ 2 advanced timers with dead-time control

○ 2 basic timers

○ 2 watchdog timers

○ 1 system tick timer

● Up to 12 communication interfaces

○ 2 I2C interfaces

○ 5 USART interfaces

○ 2 SPI interfaces, with 1 multiplexed with the I2S interface

○ 1 CAN interface

○ 1 USB2.0 full-speed interface (with an optional internal 1.5K pull-up resistor)

○ 1 SDIO interface

● Support for a hardware encryption algorithm unit (DES, AES, SHA, etc.)

Device List

Model

W55MH32L

W55MH32Q

FlashKB

1024

1024

SRAMKB

96

96

Timers

Advanced

2

2

General

10

10

Basic

2

2

Watchdog

2

2

System Tick Timer

1

1

Communication Interface

SPI/I2S

2/1

2/1

I2C

2

2

USART/UART

5

3

USB

1

1

CAN

1

1

SDIO

1

Ethernet

1

1

GPIO Ports

66

36

12-bit ADC (Number of Channels)

3 (12 channels)

3 (12 channels)

12-bit DAC (Number of Channels)

2 (2 channels)

2 (2 channels)

Random Number Module

Supported

Supported

Hardware Encryption Algorithm Unit

Supported

Supported

Page Size (K bytes)

4

4

CPU Frequency

216M

216M

Operating Voltage

2.0~3.6V

2.0~3.6V

Operating Temperature

-40~+85℃

-40~+85℃

Package

QFN100

QFN68

Size

12x12mm

8x8mm

 

1.4 Pin Assignment

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W55MH32L Pin Assignment

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W55MH32Q Pin Assignment

 

2 Evaluation Board Introduction

2.1 W55MH32L-EVB

2.1.1 Overview

The W55MH32L-EVB is a feature-rich Evaluation board based on the W55MH32L chip. It exposes all the chip's peripherals and I/O pins, facilitating chip evaluation and learning.

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W55MH32L-EVB Front Side

 

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W55MH32L-EVB Back Side

 

2.1.2  On-board Resources

The Evaluation board integrates various peripherals including a TF card slot, temperature and humidity sensor, EEPROM, user buttons, and user LEDs, offering abundant resources. It also includes an Arduino-compatible pin header for connecting expansion boards with Arduino interfaces, providing excellent functionality, compatibility, and expandability.

Additionally, the board features a built-in WIZ-Link debugger that supports debugging, program downloading, and virtual serial port functionality. This eliminates the need for external debuggers or serial port tools—just a single Type-C cable and the Evaluation board are all you need to easily handle MCU and Ethernet-related learning.

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W55MH32L-EVB  Hardware Resource Configuration Diagram

W55MH32L-EVB Hardware Resource Allocation Table

Resource

Description

MCU

W55MH32L,QFN100,1024KB FLASH,96KB RAM

Main Frequency

216MHz

GPIO

66

UART

5

SPI

2

I2C

2

USB

1

CAN

1

SDIO

1

Ethernet

1

12-bit ADC

3 (12 channels)

12-bit DAC

2 (2 channels)

RNG Module

Supported

Hardware Crypto

Supported

RTC

CR1220 battery holder ×1

Buzzer

Active buzzer ×1

Buttons

Reset ×1, BOOT ×1, User ×1, WIZ-Link OTA ×1

LED

PWR*1USER*1WIZ-Link*2

Debugger

WIZ-Link*1

Temp/Humidity Sensor

AHT20*1

EEPROM

AT24C16C-SSHM-T*1

ARDUINO Header

Supported

USB

W55MH32L*1,WIZ-Link*1

Ethernet Port

Recessed RJ45*1

 

2.2 W55MH32Q-EVB

2.2.1 Overview

The W55MH32Q-EVB is a minimum system board developed based on the W55MH32Q chip.

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W55MH32Q-EVB Front View

 

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W55MH32Q-EVB Rear View

2.2.2 Onboard Resources

The Evaluation board breaks out all I/O pins to headers, with powerful capabilities that fully meet the requirements of most embedded applications and Evaluation needs. Its compact chip size greatly simplifies testing and functional evaluation.The board features an integrated WIZ-Link debugger supporting:Debugging Firmware programming Virtual COM port functionality Eliminating the need for external debuggers or serial tools, developers can simply use a Type-C cable for:Debug logging Program downloads This integrated solution enables highly efficient chip evaluation, providing exceptional convenience for developers.

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W55MH32Q-EVB  Hardware Resource Configuration Diagram

 

W55MH32Q-EVB Hardware Resource Allocation Table

Resource

Description

MCU

W55MH32Q,QFN68,1MB FLASH,96KB RAM

Clock Frequency

216MHz

GPIO

36

UART

3

SPI

2

I2C

2

USB

1

CAN

1

Ethernet

1

12-bit ADC

3 (12 channels)

12-bit DAC

2 (2 channels)

Random Number Generator

Supported

Hardware Crypto Engine

Supported

Buttons

Reset ×1, BOOT ×1

LED

PWR*1

USB

W55MH32Q*1

Ethernet Port

RecessedRJ45*1

3 Reference Materials

For the latest reference materials, please visit:http://www.w5500.com/

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