Power off mode

Question

Dear Madam, dear Sir, I’m planning a potentially battery-powered solution with the W5500 that connects to the Internet only ever so often. For this application the 13mA power down mode consumption is still relatively high, so I consider powering the W5500 off completely, both VDD and AVDD. When completely powered off like this, what is the behaviour of the MISO, MOSI and SCLK lines? Are they high-Z, or do they source current when some voltage is applied, or is their behaviour unspecified? Thanks and regards, Sebastian Wangnick

hjjeon0608 · Answer

Hi, wangnick. MISO is output and MOSI, SCLK, SCS is input. If on power off, MISO is high-Z, and others is input so it is dependent on MCU or other output. Best regards.

wangnick · Answer

[quote="hjjeon0608 "]If on power off, MISO is high-Z, and others is input so it is dependent on MCU or other output. [/quote] Dear hjjeon0608, I understand thus that on W5500 power off (VDD=floating, AVDD=floating, GND=0V), all four W5500 pins (MISO, MOSI, SCK, SCS) are high-Z at the W5500, MISO deliberately and the others due to being inputs in any case. That’s really good news, as it allows me to remove power from the W5500 completely without further protective devices. I was really fearing that the W5500 would source current through the clamping diodes onto the VDD rail in this case, somewhat powering the chip again. Of course it implies a restart sequence, including link speed renegotiation et al, on power up of the W5500, but that is as expected. Kind regards, Sebastian Wangnick