About the W5300 category

Question

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Stanislav · Answer

Hello there. Im using W5300 to send data according to MACRAW protocol. I use FPGA state machine to control W5300, everything is working and its about 57Mb/s (socket0, 1500byte packages). But if I load the same design to FPGA with power keept on it’s will become ~108Mb/s. After FPGA design had loaded W5300 reseted without violating any timings, then I do initiation steps again and then open Socket0 again. Have no idea how is it even possible, dont know why its speed become more than 100Mb/s. Also at 100Mb/s I have no data loosing, it is still 1500bytes in package and for 2.5 million packages its only 0.002% packages that are not recieved (I think thats ok for MACRAW) The main question is ‘how does W5300 internal reset work, which parts(registers) of chip are not reseted?’