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Chip > iEthernet
by Archive_ZoroGH ≫ 2023-12-02 16:07
I am using the FPGA(x7a200t) to config W5500, the target is to using w5500 send UDP packet. now I am using the Microblaze to config W5500, at present, i have successfully config the mac, local ip, subnet, gateway. And polling the PHYCFGR untill it shows the link status is “LINK UP”.(it proves the SPI interface works well).and then I set the 16 RX\TX memory. The General Register is set done.(keep other reg default). the flow above is show as below
PHYCFGR
int W5500Init() { u8 v = 0; // hardware reset XGpio_DiscreteWrite(&gpioInst, 1, ~RST_N_W5500_PIN); // rst_n is active low sleep(1); // wait for 1ms (should greater than 500us as the datasheet show) XGpio_DiscreteWrite(&gpioInst, 1, RST_N_W5500_PIN); // software reset W5500WriteByte(MR_ADDR, GENERAL_REG, 0x80); // reset the reg // config the w5500. W5500Transfer(SHAR_ADDR, GENERAL_REG, RWB_W, OM_VDM, mac, sizeof(mac)); // {0x00, 0x08, 0xdc, 0x01, 0x02, 0x03}; W5500Transfer(SUBR_ADDR, GENERAL_REG, RWB_W, OM_VDM, subnet, sizeof(subnet)); //{192, 168, 1, 30}; W5500Transfer(GAR_ADDR, GENERAL_REG, RWB_W, OM_VDM, gateway, sizeof(gateway)); // {255, 255, 255, 0}; W5500Transfer(SIPR_ADDR, GENERAL_REG, RWB_W, OM_VDM, lip, sizeof(lip)); //{192, 168, 1, 1}; sleep(1); // sleep 1 second v = W5500ReadByte(PHYCFGR_ADDR, GENERAL_REG); // polling phycfgr while ((v & 0x01) == 0) // it will break the loop if link up { v = W5500ReadByte(PHYCFGR_ADDR, GENERAL_REG); // phycfgr } // Init memory, i want to use socket 0 only W5500WriteByte(SN_RXBUF_SIZE_ADDR, SOCKET1_REG, 0); // rx buf size W5500WriteByte(SN_TXBUF_SIZE_ADDR, SOCKET1_REG, 0); // tx buf size W5500WriteByte(SN_RXBUF_SIZE_ADDR, SOCKET2_REG, 0); // rx buf size W5500WriteByte(SN_TXBUF_SIZE_ADDR, SOCKET2_REG, 0); // tx buf size W5500WriteByte(SN_RXBUF_SIZE_ADDR, SOCKET3_REG, 0); // rx buf size W5500WriteByte(SN_TXBUF_SIZE_ADDR, SOCKET3_REG, 0); // tx buf size W5500WriteByte(SN_RXBUF_SIZE_ADDR, SOCKET4_REG, 0); // rx buf size W5500WriteByte(SN_TXBUF_SIZE_ADDR, SOCKET4_REG, 0); // tx buf size W5500WriteByte(SN_RXBUF_SIZE_ADDR, SOCKET5_REG, 0); // rx buf size W5500WriteByte(SN_TXBUF_SIZE_ADDR, SOCKET5_REG, 0); // tx buf size W5500WriteByte(SN_RXBUF_SIZE_ADDR, SOCKET6_REG, 0); // rx buf size W5500WriteByte(SN_TXBUF_SIZE_ADDR, SOCKET6_REG, 0); // tx buf size W5500WriteByte(SN_RXBUF_SIZE_ADDR, SOCKET7_REG, 0); // rx buf size W5500WriteByte(SN_TXBUF_SIZE_ADDR, SOCKET7_REG, 0); // tx buf size W5500WriteByte(SN_RXBUF_SIZE_ADDR, SOCKET0_REG, 16); // rx buf size W5500WriteByte(SN_TXBUF_SIZE_ADDR, SOCKET0_REG, 16); // tx buf size return 0; }
I want only use the socket0 , here is the code
void W5500ConfigSocket(u8 socketBsb) { u8 v = 0; v = W5500ReadByte(SN_SR_ADDR, socketBsb); // v == 0x75 weird value W5500WriteByte(SN_CR_ADDR, socketBsb, CLOSE); // set CR to close v = W5500ReadByte(SN_CR_ADDR, socketBsb); while (v != 0) // polling the CR untill it return to zeros. here it stucks { v = W5500ReadByte(SN_CR_ADDR, socketBsb); } W5500WriteByte(SN_IR_ADDR, socketBsb, 0xFF); // clear interupt W5500WriteByte(SN_MR_ADDR, socketBsb, MR_UDP); // set udp mode u8 destIp[] = {192, 168, 1, 124}; W5500Write2BytesSwapEndian(SN_PORT_ADDR, socketBsb, 8090); W5500WriteByte(SN_CR_ADDR, socketBsb, OPEN);// if I do not set the CR to close first, rather to set OPEN first, it also stucks, not return to zeros sleep(1); v = W5500ReadByte(SN_CR_ADDR, socketBsb); while (v != 0) { v = W5500ReadByte(SN_CR_ADDR, socketBsb); } while ( v == 0) { v = W5500ReadByte(SN_SR_ADDR, socketBsb); } W5500WriteBuffer(SN_DIPR_ADDR, socketBsb, destIp); W5500Write2BytesSwapEndian(SN_DPORT_ADDR, socketBsb, 8888); W5500Write2BytesSwapEndian(SN_MSSR_ADDR, socketBsb, 1470); W5500WriteByte(SN_TTL_ADDR, socketBsb, 0x80); return; }
Is there any flow wrong? why the CR not return to zero, i have search others topic also refer to this. Is it a hardware error?