w5300 hold interrupt pin asserted low
Ethernet Chips
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Ethernet Chips
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RE: w5300 hold interrupt pin asserted low
by sparrow ·
Ok, thank you! Add this to my ISR.
Now I have interest conditionof wiznet chip, when RSR value is 0. And SSR value is 0x11.
I assume, that rx fifo is full at this time. Is it so?
RE: w5300 hold interrupt pin asserted low
by sparrow ·
Thank you!
First phenomenon from errata seems like to my problem. But I not execute close/disconnect.
DSP just send data and freezes at waiting for SENDOK acknowledgment:
WIZnetSendOk[n]=false;
wrWIZnetReg(Sn_CR(n))=CMD_SEND;
while(!WIZnetSendOk[n]);
////(WIZnetSendOk[n] set in ISR)
RE: w5300 hold interrupt pin asserted low
by sparrow ·
RE: w5300 hold interrupt pin asserted low
by sparrow ·
Thank you!
I add your modification, but still has 0x11 at SSR.
I add guard counter and sending CMD_DISCON for case where counter decrement to 0. This so rough, but reconnect reset 0x11 state. And…not always.
Have you idea how to avoid this state?
RE: w5300 hold interrupt pin asserted low
by sparrow ·
So this udp sending didn’t break current tcp connection?
RE: w5300 hold interrupt pin asserted low
by sparrow ·
Please, explain, whether the current connection will be preserved?