---
title: "W5500 Decoder (saleae logic analyzer)"
url: "https://maker.wiznet.io/rena/projects/W5500-Decoder-saleae-logic-analyzer/"
markdown_url: "https://maker.wiznet.io/rena/projects/W5500-Decoder-saleae-logic-analyzer/md"
type: "UCC: User Created Content"
author: "rena"
original_author: "rena"
original_url: "https://github.com/newAM/saleae-logic-w5500"
published: "2022-06-29"
language: "en"
hardware: ["WIZnet W5500"]
likes: 0
views: 352
comments: 0
source: "WIZnet Makers (https://maker.wiznet.io/)"
---

# W5500 Decoder (saleae logic analyzer)

> W5500 Decoder (saleae logic analyzer)

Original author: rena (source: https://github.com/newAM/saleae-logic-w5500)

## Components

- **WIZnet W5500** x 1 ([docs](https://docs.wiznet.io/Product/Chip/Ethernet/W5500))
- Software: **Saleae logic analyzer**

WIZnet parts: W5500 ([Datasheet](https://docs.wiznet.io/Product/Chip/Ethernet/W5500/datasheet?utm_source=maker&utm_medium=project&utm_campaign=w5500), [product hub](https://maker.wiznet.io/products/w5500/))

## Article

Decodes Wiznet W5500 SPI bus transactions in VDM mode.

## <https://github.com/newAM/saleae-logic-w5500#features>Features

- Annotates address phase with "Address {address_value}"

- Annotates the control phase with "{name} block {rw}"

- Annotates following bytes with "Read {register} {value}" or "Write {register} {value}"

**Original link:?<https://github.com/newAM/saleae-logic-w5500>**

---

Source: https://maker.wiznet.io/rena/projects/W5500-Decoder-saleae-logic-analyzer/