---
title: "STM32 F407 + FPGA + Ethernet Dual Core Core Board Development Board Motion Control"
url: "https://maker.wiznet.io/mayuri/resellers/stm32-f407-fpga-ethernet-dual-core-core-board-development-board-motion-control/"
markdown_url: "https://maker.wiznet.io/mayuri/resellers/stm32-f407-fpga-ethernet-dual-core-core-board-development-board-motion-control/md"
type: "VAR: Value-Added Reseller Products"
author: "AliExpress"
author_url: "https://ja.aliexpress.com/item/4000090045321.html?spm=a2g0o.productlist.main.65.1ae0366awb58zl&algo_pvid=82610ca5-d702-4246-ad5d-d8dc48877b5e&algo_exp_id=82610ca5-d702-4246-ad5d-d8dc48877b5e-32&pdp_ext_f=%7B%22sku_id%22%3A%2210000000239259387%22%7D&pdp_npi=2%40dis%21KRW%21130367.0%21122545.0%21%21%21%21%21%40210218bf16698694075232512d074a%2110000000239259387%21sea&curPageLogUid=YjcG89h9BpcJ"
editor: "WIZnet"
editor_url: "https://maker.wiznet.io/"
original_author: "AliExpress"
original_url: "https://ja.aliexpress.com/item/4000090045321.html?spm=a2g0o.productlist.main.65.1ae0366awb58zl&algo_pvid=82610ca5-d702-4246-ad5d-d8dc48877b5e&algo_exp_id=82610ca5-d702-4246-ad5d-d8dc48877b5e-32&pdp_ext_f=%7B%22sku_id%22%3A%2210000000239259387%22%7D&pdp_npi=2%40dis%21KRW%21130367.0%21122545.0%21%21%21%21%21%40210218bf16698694075232512d074a%2110000000239259387%21sea&curPageLogUid=YjcG89h9BpcJ"
published: "2022-12-01"
language: "en"
hardware: ["WIZnet W5500"]
likes: 0
views: 379
comments: 0
source: "WIZnet Makers (https://maker.wiznet.io/)"
---

# STM32 F407 + FPGA + Ethernet Dual Core Core Board Development Board Motion Control

> The STM32F405xx and STM32F407xx series are based on a high-performance ARM® Cortex®-M4 32-bit RISC core operating up to 168 bytes.

Original author: AliExpress (source: https://ja.aliexpress.com/item/4000090045321.html?spm=a2g0o.productlist.main.65.1ae0366awb58zl&algo_pvid=82610ca5-d702-4246-ad5d-d8dc48877b5e&algo_exp_id=82610ca5-d702-4246-ad5d-d8dc48877b5e-32&pdp_ext_f=%7B%22sku_id%22%3A%2210000000239259387%22%7D&pdp_npi=2%40dis%21KRW%21130367.0%21122545.0%21%21%21%21%21%40210218bf16698694075232512d074a%2110000000239259387%21sea&curPageLogUid=YjcG89h9BpcJ)

## Components

- **WIZnet W5500** x 1 ([docs](https://docs.wiznet.io/Product/Chip/Ethernet/W5500))

WIZnet parts: W5500 ([Datasheet](https://docs.wiznet.io/Product/Chip/Ethernet/W5500/datasheet?utm_source=maker&utm_medium=project&utm_campaign=w5500), [product hub](https://maker.wiznet.io/products/w5500/))

## Article

STM32F407+FPGA+Ethernet Dual Core Development Board System Board Ultra High Cost Performance Motion Control

Development board resource introduction:

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FPGA: Cyclone IV EP4CE10E22C8
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FPGA configuration chip: EPCS4, 4M
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Arm: STM32F407ZGT6
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Ethernet: W5500 10/100m
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FALSH: W25Q128, 128m capacity, can be used for SPI protocol storage experiments.
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EERPOM: AT24C64, 64 meters capacity, can carry out I2C protocol storage experiments
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Serial port: MAX3232 STM32 and FPGA serial port resource
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User Experiment LEDs: 4 pcs.
2 \ each for STM32 and FPGA

User experiment button key: 4.
2 \ each for STM32 and FPGA

System Clock: FPGA: Onboard Active Clock. Arm: standard dual clock.
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Debug interface: FPGA JTAG, ARM JTAG is the standard debug interface
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The board is clearly marked as ejected from all user I/Os.
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Power supply: use dedicated power chip such as LT1085, external DC5V input interface
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STM32 and FPGA are connected by FSMC bus, and can perform parallel high-speed data transmission.
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The serial port connection mode is set between STM32 and FPGA, which performs data transmission serial protocol.
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Core board size: 100mm x 100mm
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STM32F407 chip introduction

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Package: LQFP-144

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The STM32F405xx and STM32F407xx series are based on a high-performance ARM® Cortex®-M4 32-bit RISC core operating up to 168 bytes. The Cortex-M4 core features a single-precision floating-point unit (FPU) that supports all ARM single-precision data processing instructions and data types. It also sets his DSP instructions and memory protection unit (MPU) to improve application security. In this document, the Cortex-M4 core FPU is called Cortex-M4F.

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The STM32F405xx and STM32F407xx families integrate high-speed embedded memory (up to 1MB and 192KB of flash memory and SRAM, respectively) with up to 4 KB of backup SRAM, as well as numerous connections to 2 APB buses, 2 AHBs Bus and Enhanced 32-bit AHB Bus Matrix Enhanced I/O and peripherals.

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All models feature 3 12-bit ADCs, 2 DACs, 1 low power RTC, 12 general purpose 16-bit timers (including 2 PWM timers for motor control), and 2 general purpose 32-bit timers. . 1 True Random Number Generator (RNG). They come with standard and advanced communication interfaces.

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Characteristic

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Kernel: ARM 32-bit Cortex™-M4 cpu FPU, adaptive real-time (art accelerator™) running performance with zero latency flash memory, clock speed up to 168MHz, memory protection unit, capable of achieving up to 210 DMIPS/performance of 1.25 DMIPS/MHz (drystone 2.1) dsp instruction set.
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Memory
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Up to 1 Byte Flash Memory
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Up to 192 + 4 Bytes SRAM 64-Kbyte etc. CCM (Core Combined Memory) Data RAM
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Flexible Memory Supports CompactFlash, SRAM, PSRAM, Nor and NAND Memories
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LCD Parallel Interface, 8080/6800 Mode
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Clock, Reset, and Power Management
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1.8 to 3.6 v applied supply and I/O
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Pol, PDR, PVD and BOR
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4 to 26 mhz crystal oscillator
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Internal 16 factory-trimmed RC (1 % accuracy)
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32 125khz oscillator RTC calibration
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internal 32khz rc calibration
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sleep, stop and standby modes
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RTC for VBATsupply, 20 × 32-bit backup registers + optional 4 KB backup SRAM
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3 12-bit, 2.4 msps A/D converters: up to 24 channels, up to 7.2 MSPS triple-cross mode
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2 12-bit d/a converters
\ general-
purpose DMA : 16 DMA controllers with FIFO and burst support up to 17 timers: 12 16-bit timers, and 2 32-bit timers up to 168 MHz, each with 4 input/output compare/PWM or pulse counters and quadrature (incremental) encoder input
\ debug Mode \ Serial Wire Debug (SWD) & jtag Interface \ Cortex-M4 Embedded Trace Macrocell? \ Up to 140 I/O Port Interruption \ Up to 136 Fast i/Os \ Up to 84 MHz \ Up to 138 5 V Tolerant I/O \ Up to 15 Communication interface \ Up to 3 × I2C interfaces (SMBus/PMBus) \

Up to 4 Usart/2 UARTs (10.5 Mbit/s, iso 7816 interface, LIN, irDA, modem control)
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Up to 3 SPIs (37.5 Mbit/s), I2S muxed to achieve full-duplex audio and 2-class accuracy via Internal Audio PLL or External Clock
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2x CAN Interface (2.0B Active)
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SDIO Interface
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Advanced Connectivity
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USB 2.0 Full-Speed ​​Device/Host / OTG Controller On-Chip PHY
\ USB
2.0 Hi-Speed/Full-Speed ​​Device/Host/ OTG controller dedicated DMA, on-chip high-speed PHY and ULPI
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10/100 Mac dedicated DMA: support IEEE 1588v2 hardware, MII/RMII
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8~14-bit parallel camera interface: speed up to 54MB/s
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true random number generation Instrument
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CRC calculation unit
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96-bit unique ID
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RTC: sub-second precision, hardware calendar

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W5500 chip introduction

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The W5500 is a hardware TCP/IP embedded Ethernet controller that provides an easy Internet connectivity solution for embedded systems. The W5500 integrates a TCP/IP stack, 10/100M Ethernet data link layer (MAC) and physical layer (PHY), enabling users to extend network connectivity using its application chips.

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\\ Market-proven
WIZnet
full hardware TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP and pppoe protocols. The W5500 embeds 32 18K bytes on-chip cache for Ethernet packet processing. If you use W5500, you just implement some simple socket programming ethernet application. This is quicker and easier than other embedded ethernets. User can use 8 hardware socket independent communication.

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\\ The
W5500
provides an SPI (Peripheral Serial Interface) for easy integration into peripherals in the MCU. In addition, W5500 has a new high-efficiency SPI protocol to support 80MHz speed, enabling better high-speed network communication. To reduce system power consumption, the W5500 offers wake-on-wall (WOL) and power-down modes for customers to choose from.

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\\ Characteristics
_

\\ -Support hardware TCP/IP protocols: TCP, UDP, ICMP, IPv4, ARP, IGMP,
PPPoE

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- Supports 8 simultaneous ports (sockets) simultaneous communication

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-
support power down mode

\\ - support network
wakeup

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- High-speed serial peripheral interface (SPI mode 0, 3)

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- Internal 32 18K byte transmit and receive buffers

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Embedded 10 BaseT/100 100basetx Ethernet physical layer (PHY)

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- support auto-negotiation (10/100 based full/half duplex)

IP
fragmentation for \\ is not supported

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-3.3v working voltage, I/O signal port with voltage tolerant to 5;

\\ -
LED
status display (full/half duplex, network connection, network speed, active status)

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-48-lead LQFP lead-free package (7 × 7 mm, 0.5 mm pitch)

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target application

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\\ The
W5500
is suitable for the following embedded applications:

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- Home networking equipment: set-top boxes, personal video recorders, digital media adapters

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- Serial Ethernet: access control, LED display, wireless AP relay, etc.

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Ethernet in parallel: POS/micro printers, copiers

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- Ethernet: storage devices, network printers

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- GPIO Ethernet: home network sensor

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Security system: digital video recorder, network camera, information kiosk

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Factory and building automation control system

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-Medical monitoring equipment

\\
embedded
server

![](https://ae01.alicdn.com/kf/H13dcdf54e0914d5e9b485528044b3072Y.jpg)![](https://ae01.alicdn.com/kf/H731991c2ebbf4e5b8b33ad00ae12f867Z.jpg)![](https://ae01.alicdn.com/kf/H70a78a921ac247b5a4e8627aed9d5e9cE.jpg)

packing list:

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1. core board

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2. Matching DVD disc (module routines, schematics, datasheets, technical documentation, development software, etc.)

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3.High quality DC switching power supply 1 (5V)

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4.One antistatic packaging bag.

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Source: https://maker.wiznet.io/mayuri/resellers/stm32-f407-fpga-ethernet-dual-core-core-board-development-board-motion-control/
