 
wait 50 ms

;wait 50 ms


. . . . . . . . . . . . . .

;used socket 2 
 
 MOVS R2,#0x46
 LSLS R2,R2,#8
 MOVS R3,#9
 ORRS R2,R2,R3
 LSLS R2,R2,#8
 MOVS R3,#2
 ORRS R2,R2,R3
 LSLS R2,R2,#8
 MOVS R3,#0x4
 ORRS R2,R2,R3         ;load in R2 address S2_TX_FSR(0x46090204)

checking_free_size_register 
 LDR R4,[R2]
 
 MOVS R3,#0x34
 
 CMPS R4,R3            ;we check whether 52 bytes for transmission are free in tx_buffer
 BHI checking_free_size_register
 

 LDR R4,[R2,#0xc]       ;load in R4 value from S2_TX_WR

 
 MOVS R5,#0x46
 LSLS R5,R5,#8
 MOVS R3,#0xa
 ORRS R5,R5,R3
 LSLS R5,R5,#16         ;load in R5 address socket2_tx_buffer(0x460a0000)

 ADDS R4,R4,R5          ;in R4 address for sending data
 

 MOVS R3,#0x5f          ;first byte 0x5f   
 STRB R3,[R4]           ;store in socket2_tx_buffer
 MOVS R3,#0xc3          ;second byte 0xc3
 STRB R3,[R4,#1]        ;store in socket2_tx_buffer

 
 ADDS R4,R4,#2          ;modified address for transmission
 
 
 MOVS R2,#0x20
 LSLS R2,R2,#8
 MOVS R3,#00
 ORRS R2,R2,R3
 LSLS R2,R2,#8
 MOVS R3,#03
 ORRS R2,R2,R3
 LSLS R2,R2,#8
 MOVS R3,#0x10
 ORRS R2,R2,R3          ;in R2 address SRAM memory(0x20000310)
 
 

 MOVS R7,#0x46
 LSLS R7,R7,#8
 MOVS R3,#0xb
 ORRS R7,R7,R3
 LSLS R7,R7,#16         ;in R7 the inadmissible address for socket2_tx_buffer(0x460b0000)


 MOVS R5,#50            ;50 bytes will correspond from SRAM of memory in socket2_tx_buffer
      

 MOVS R6,#0             ;in R6 will be counter of bytes
 
corresponding_50_bytes
 LDRB R3,[R2]           ;load byte from SRAM memory
 STRB R3,[R4]           ;store byte from socket2_tx_buffer
 ADDS R2,R2,#1          ;modify SRAM address
 ADDS R4,R4,#1          ;modify socket2_tx_buffer address
 CMPS R4,R7             ;compare
 BCS occur_overflowing_socket2_tx_buffer 

 B inc_r6               ;modify counter 


occur_overflowing_socket2_tx_buffer 

 MOVS R4,#0x46
 LSLS R4,R4,#8
 MOVS R3,#0xa
 ORRS R4,R4,R3
 LSLS R4,R4,#16         ;modify socket2_tx_buffer address (0x460a0000)


inc_r6 
 ADDS R6,R6,#1          ;increment counter
 
 CMPS R5,R6             ;compare with 50 bytes
 BNE corresponding_50_bytes
 
 
 MOVS R2,#0x46
 LSLS R2,R2,#8
 MOVS R3,#9
 ORRS R2,R2,R3
 LSLS R2,R2,#8
 MOVS R3,#2
 ORRS R2,R2,R3
 LSLS R2,R2,#8
 MOVS R3,#0xc
 ORRS R2,R2,R3          ;load in R2 adress S2_TX_WR(0x4609020c)
 
 MOVS R3,#0xff
 LSLS R3,R3,#8
 MOVS R1,#0xff
 ORRS R3,R3,R1
 LSLS R3,R3,#16
 BICS R4,R4,R3          ;fill with zero high 16 bits 
 
 
 STR R4,[R2,#4]         ;modify S2_TX_WR 
 
 MOVS R2,#0x46
 LSLS R2,R2,#8
 MOVS R3,#9
 ORRS R2,R2,R3
 LSLS R2,R2,#16         ;load in R2 adress S2_MR(0x46090000)
 
 MOVS R3,#0x20
 STR R3,[R2,#0x10]      ;set the command "SEND" in S2_CR
   
 MOVS R4,#0x10
wait_send_ok
 LDR R3,[R2,#0x20]      ;load in R3 value from S2_IR
 TSTS R3,R4
 BEQ wait_send_ok 

 STR R4,[R2,#0x28]      ;if "send_ok" occured, modify S2_ICR
 

 B wait_50_ms