---
title: "W5500 10BASE-T compliance test: how to transmit continuous test data (min IPG / random / all-ones)?"
url: "https://maker.wiznet.io/forum/16185"
markdown_url: "https://maker.wiznet.io/forum/16185/md"
type: "Forum topic"
category: "Ethernet Chips"
author: "ciniml"
created: "2026-10-26T20:02:34+09:00"
last_activity: "2026-10-26T20:02:34+09:00"
language: "en"
tags: ["W5500"]
views: 1
replies: 0
source: "WIZnet Makers forum (https://maker.wiznet.io/forum/)"
---

# W5500 10BASE-T compliance test: how to transmit continuous test data (min IPG / random / all-ones)?

## Question

Asked by ciniml on 2026-10-26 in Ethernet Chips.

Hello,

We are running IEEE 802.3 10BASE-T transmitter compliance tests (Keysight N5392A software + N5395 test fixture) on our product that uses the W5500 with an ESP32-S3 host over SPI. We could not find a way to make the W5500 transmit the continuous test signals that some tests expect. We would appreciate advice on how WIZnet did this.

**Our setup**

- PHY forced to 10BASE-T (PHYCFGR, auto-negotiation disabled). A link partner forced to 10M feeds link pulses into the DUT RX pair, because the W5500 does not transmit while the link is down.

- SOCK0 in MACRAW mode. We send 1514-byte broadcast frames with random (or all-ones) payload.

- To shorten the inter-frame gap, we write the next frame into the TX buffer beyond Sn_TX_WR while the current frame is still on the wire. Right after Sn_IR.SEND_OK, we update Sn_TX_WR and issue SEND. SEND and the SEND_OK clear go in one SPI burst (Sn_CR + Sn_IR).

**Result**

- About 754 frames/s, about 92 % line utilization. A frame checker shows an inter-frame gap of 77–121 µs (average about 106 µs), with no FCS errors.

Breakdown on our side:

- SEND → SEND_OK is about 1262 µs, against a wire time of 1220.8 µs.

- The host SPI transactions after SEND_OK take about 57 µs.

- Sn_TX_RD advances only at about the same time as SEND_OK, so we found no safe point to issue the next SEND earlier.

- In the MAU template (eye) test, the idle periods between frames appear as a flat line through the middle of the mask, and the test fails.

**Questions**

1. The "iEthernet W5500 Compliance Test Report 1.0.0 (MAR 2015)" says the results were measured on a PHY IP test chip, with frames sourced from SmartBits. For the W5500 itself, how did WIZnet generate the 10BASE-T transmitter test signals: random data for the template, jitter and TP_IDL tests, and all-ones for the harmonic content test? Is there a test firmware or procedure you can share?

2. Is there any test mode, or any undocumented register, that makes the W5500 PHY transmit a continuous pattern (random / all-ones / PRBS), or transmit without a link partner?

3. In MACRAW mode, is there any way to send back-to-back frames closer to the minimum IPG (9.6 µs)? For example, queuing more than one frame per SEND, or issuing the next SEND before SEND_OK. What is the typical internal latency from SEND to the start of transmission, and from the end of transmission to SEND_OK?

Thank you in advance.

---

Source: https://maker.wiznet.io/forum/16185
