---
title: "W5500 with reference RJ45 magjack design: link-up issue on custom 2-layer board"
url: "https://maker.wiznet.io/forum/16067"
markdown_url: "https://maker.wiznet.io/forum/16067/md"
type: "Forum topic"
category: "Ethernet Chips"
author: "shiohamu_d"
created: "2026-05-02T22:18:50+09:00"
last_activity: "2026-05-02T22:28:28+09:00"
language: "en"
tags: ["ESP32", "W5500"]
views: 5
replies: 0
source: "WIZnet Makers forum (https://maker.wiznet.io/forum/)"
---

# W5500 with reference RJ45 magjack design: link-up issue on custom 2-layer board

## Question

Asked by shiohamu_d on 2026-05-02 in Ethernet Chips.

Hello,

I am having trouble with the PHY side of a W5500 design and would like to ask for advice on the PCB/layout around the RJ45 magjack.

### Summary

- Device: **W5500** in **LQFP-48**

- Interface to MCU: **SPI**

- MCU: **ESP32-Dev**

- Board: **2-layer PCB**, top-side component placement

- RJ45: **ARJM11A1-009-AB-EW2** magjack

- Design basis: **W5500-Ref-RJ45With** reference schematic

- Power supply: **LM2576S-3.3**

- SPI communication is working correctly. I can read the **version register**.

- When I replace the W5500 section with a module, the device can **ping 192.168.1.7/24** successfully, so I believe the SPI side is fine.

### Symptoms

- With **mode = 000** and **011**, the link comes up.

- However, the router never shows proper communication/ACKs.

- With **mode = 001, 010, or 100**, the link does not come up at all.

- In **mode = 000**, I also see about **7 blinks** on the relevant LED/activity indication.

### Wiring / layout details

- TXP → pin 1

- TXN → pin 2

- RXP → pin 3

- RXN → pin 6

- RX side uses capacitors, as in the reference design

- Differential pairs are routed with **GND beneath them**

- The area under the RJ45 is **kept free of copper**

- Only the **RJ45 shield / CGND pin (pin 8)** is connected to the **CGND** side

- **GND and CGND** are separated using a **1 nF, 1 kV capacitor**

- I used **BLM18PG121SN1D** instead of **HH-1M1608-121JT**

- Decoupling capacitors are the same as the reference circuit

- RESETn is controlled by the **ESP32-Dev**

- The reset timing is not measured, and there is no pull-up on RESETn

### What changed from the reference design

Compared with the reference, I mainly changed:

- the **routing of the differential pairs**

- the **placement of the parts**

- the **ferrite bead part number** mentioned above

I can attach the **schematic** and **PCB layout image** around the W5500 if needed.

My main question is whether the **RJ45/magjack layout, CGND handling, or differential pair routing** could be causing the link issue, and whether there is anything obvious that I should correct in the PCB layout.

Thank you for any advice.

Attachments:

- [W5500_pattern.png](https://maker.wiznet.io/forum/getAttach.asp?aidx=366)
- [W5500_pattern_forword.png](https://maker.wiznet.io/forum/getAttach.asp?aidx=367)
- [W5500_pattern_back.png](https://maker.wiznet.io/forum/getAttach.asp?aidx=368)
- [W5500_circuit.png](https://maker.wiznet.io/forum/getAttach.asp?aidx=369)

---

Source: https://maker.wiznet.io/forum/16067