---
title: "STM32F746을 이용하여 W6100을 제어하고 하는데 잘 안되내요"
url: "https://maker.wiznet.io/forum/15842"
markdown_url: "https://maker.wiznet.io/forum/15842/md"
type: "Forum topic"
category: "Ethernet Chips"
author: "dlsvykim0824"
created: "2025-08-18T16:45:13+09:00"
last_activity: "2025-08-20T09:47:34+09:00"
language: "en"
views: 6
replies: 1
source: "WIZnet Makers forum (https://maker.wiznet.io/forum/)"
---

# STM32F746을 이용하여 W6100을 제어하고 하는데 잘 안되내요

## Question

Asked by dlsvykim0824 on 2025-08-18 in Ethernet Chips.

안녕하세요.

현재 STM32F746IG를 이용하여 W6100을 제어하고자 합니다. 이전에는 W6100EVB 보드(STM32F103 기반)를 사용하여 FSMC + DMA 기능을 통해 정상적으로 동작을 확인했습니다. 이를 참고하여 STM32F746IG에서도 FSMC(FMC로 명명) 및 DMA 기능을 설정했지만, 기대한 대로 동작하지 않고 있습니다.

CIDR 및 getVER 함수로는 정상적으로 데이터를 읽어올 수 있으나, MAC 주소를 Write할 때 문제가 발생합니다. FMC 타이밍을 여러 방식으로 조정해도 데이터가 누락되어 제대로 저장되지 않습니다. STM32F746IG의 파형을 확인해보면, 총 6바이트 중 3바이트만 기록되며, 이마저도 순차적으로 저장되지 않고 일부가 누락된 상태로 기록됩니다.

STM32F746IG의 FMC 및 DMA 설정을 첨부하오니, 검토 부탁드립니다. 혹시 타이밍이나 설정에서 놓친 부분이 있다면 조언 부탁드립니다.

/** Perform the SRAM1 memory initialization sequence
*/
hsram1.Instance = FMC_NORSRAM_DEVICE;
hsram1.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
/* hsram1.Init */
hsram1.Init.NSBank = FMC_NORSRAM_BANK1;
hsram1.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_ENABLE;
hsram1.Init.MemoryType = FMC_MEMORY_TYPE_PSRAM;
hsram1.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_8;
hsram1.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE;
hsram1.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW;
hsram1.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS;
hsram1.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
hsram1.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
hsram1.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
hsram1.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
hsram1.Init.WriteBurst = FMC_WRITE_BURST_DISABLE;
hsram1.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ASYNC;
hsram1.Init.WriteFifo = FMC_WRITE_FIFO_DISABLE;
hsram1.Init.PageSize = FMC_PAGE_SIZE_NONE;
/* Timing */
Timing.AddressSetupTime = 9;
Timing.AddressHoldTime = 3;
Timing.DataSetupTime = 24;
Timing.BusTurnAroundDuration = 1;
Timing.CLKDivision = 16;
Timing.DataLatency = 17;
Timing.AccessMode = FMC_ACCESS_MODE_A;
/* ExtTiming */

/* DMA controller clock enable */
__HAL_RCC_DMA2_CLK_ENABLE();

/* Configure DMA request hdma_memtomem_dma2_stream4 on DMA2_Stream4 */
hdma_memtomem_dma2_stream4.Instance = DMA2_Stream4;
hdma_memtomem_dma2_stream4.Init.Channel = DMA_CHANNEL_0;
hdma_memtomem_dma2_stream4.Init.Direction = DMA_MEMORY_TO_MEMORY;
hdma_memtomem_dma2_stream4.Init.PeriphInc = DMA_PINC_ENABLE;
hdma_memtomem_dma2_stream4.Init.MemInc = DMA_MINC_ENABLE;
hdma_memtomem_dma2_stream4.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_memtomem_dma2_stream4.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_memtomem_dma2_stream4.Init.Mode = DMA_NORMAL;
hdma_memtomem_dma2_stream4.Init.Priority = DMA_PRIORITY_HIGH;
hdma_memtomem_dma2_stream4.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
hdma_memtomem_dma2_stream4.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL;
hdma_memtomem_dma2_stream4.Init.MemBurst = DMA_MBURST_SINGLE;
hdma_memtomem_dma2_stream4.Init.PeriphBurst = DMA_PBURST_SINGLE;
if (HAL_DMA_Init(&hdma_memtomem_dma2_stream4) != HAL_OK)
{
Error_Handler( );
}

/* Configure DMA request hdma_memtomem_dma2_stream5 on DMA2_Stream5 */
hdma_memtomem_dma2_stream5.Instance = DMA2_Stream5;
hdma_memtomem_dma2_stream5.Init.Channel = DMA_CHANNEL_0;
hdma_memtomem_dma2_stream5.Init.Direction = DMA_MEMORY_TO_MEMORY;
hdma_memtomem_dma2_stream5.Init.PeriphInc = DMA_PINC_ENABLE;
hdma_memtomem_dma2_stream5.Init.MemInc = DMA_MINC_ENABLE;
hdma_memtomem_dma2_stream5.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
hdma_memtomem_dma2_stream5.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
hdma_memtomem_dma2_stream5.Init.Mode = DMA_NORMAL;
hdma_memtomem_dma2_stream5.Init.Priority = DMA_PRIORITY_HIGH;
hdma_memtomem_dma2_stream5.Init.FIFOMode = DMA_FIFOMODE_ENABLE;
hdma_memtomem_dma2_stream5.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL;
hdma_memtomem_dma2_stream5.Init.MemBurst = DMA_MBURST_SINGLE;
hdma_memtomem_dma2_stream5.Init.PeriphBurst = DMA_PBURST_SINGLE;
if (HAL_DMA_Init(&hdma_memtomem_dma2_stream5) != HAL_OK)
{
Error_Handler( );
}

/* DMA interrupt init */
/* DMA2_Stream4_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream4_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream4_IRQn);
/* DMA2_Stream5_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream5_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream5_IRQn);

Attachments:

- [비정상데이터-746.png](https://maker.wiznet.io/forum/getAttach.asp?aidx=281)
- [정상파형-103.png](https://maker.wiznet.io/forum/getAttach.asp?aidx=282)

## Replies

### Reply 1 by Hannah, 2025-08-20

안녕하세요.

현재 클럭은 몇으로 설정되어 있나요?

클럭을 더 낮춰서 테스트해보시겠어요?

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Source: https://maker.wiznet.io/forum/15842