---
title: "Question regarding Layout of W5500-EVB-Pico"
url: "https://maker.wiznet.io/forum/14839"
markdown_url: "https://maker.wiznet.io/forum/14839/md"
type: "Forum topic"
category: "Ethernet Chips"
author: "Ing-Dom"
created: "2023-03-23T08:03:32+09:00"
last_activity: "2023-03-23T08:03:32+09:00"
language: "en"
views: 237
replies: 0
source: "WIZnet Makers forum (https://maker.wiznet.io/forum/)"
---

# Question regarding Layout of W5500-EVB-Pico

## Question

Asked by Ing-Dom on 2023-03-23 in Ethernet Chips.

While layouting my W5500 board I came accros the W5500-EVB-Pico.

I was really suprised about the Layout especially the RXN/RXP and TXN/TXP pairs…
![2023-03-23_07_03_11-GerbView](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/c/c74527ede1f011e4e6b7e24bcd5fef6af0b253ac.png)

1. TX pair is routed from back to top over vias, I thought that should be avoided at almost any cost
   Vias are not so bad after all?!

2. the pairs look so tiny, how can they be have a Zdiff of 100 Ohms ? When I calculate the dimensions of a pair with 100 Ohms on a 0.8 2-Layer board my track width is almost a 1 mm

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Source: https://maker.wiznet.io/forum/14839