---
title: "w5500 - SPI issue reading registers"
url: "https://maker.wiznet.io/forum/14661"
markdown_url: "https://maker.wiznet.io/forum/14661/md"
type: "Forum topic"
category: "Ethernet Chips"
author: "sarah.dellanno"
created: "2022-09-27T14:47:48+09:00"
last_activity: "2023-01-13T06:54:54+09:00"
language: "en"
views: 694
replies: 4
source: "WIZnet Makers forum (https://maker.wiznet.io/forum/)"
---

# w5500 - SPI issue reading registers

## Question

Asked by sarah.dellanno on 2022-09-27 in Ethernet Chips.

I am currently trying to use the w5500 chip (wiz850io) for ethernet communication using SPI. I am having issues setting the network configuration. When I read and write MISO only outputs 0x01 0x02 0x03. Is this the correct output for both reading and writing?

> uint8_t txsize[8] = {2,2,2,2,2,2,2,2};
> uint8_t rxsize[8] = {2,2,2,2,2,2,2,2};
>
> wiz_NetInfo netInfo = { .mac = {0x00, 0x08, 0xdc, 0x1d, 0x29, 0xd7}, // Mac address
> .ip = {192, 168, 1, 36}, // IP address
> .sn = {255, 255, 255, 0}, // Subnet mask
> .gw = {192, 168, 1, 1}, // Gateway address
> .dns = {8, 8, 8, 8}, // DNS server
> .dhcp = NETINFO_STATIC }; // DHCP enable / disable
>
> uint8_t Ch_Version;
> SpiIf_ChConfig GETchConfig;
> wiz_NetInfo getnetInfo;
> int8_t phy_link =0;

> void w5500_Init(void)
> {
> /* W5500 Chip Reset*/
> IfxPort_setPinLow(&MODULE_P02,6);
> delay_cnt(5000);
> IfxPort_setPinHigh(&MODULE_P02,6);
> delay_cnt(10000);
>
> ```
reg_wizchip_cs_cbfunc(cs_sel, cs_desel);
reg_wizchip_spi_cbfunc(spi_rb, spi_wb);
reg_wizchip_spiburst_cbfunc(spi_rburst, spi_wburst);

delay_cnt(10000);
wizchip_init(txsize, rxsize);

do{//check phy status.
    if(ctlwizchip(CW_GET_PHYLINK,&phy_link) == -1){
        printf("Unknown PHY link status.\r\n");
        delay_cnt(10000);
    }

}while(phy_link == PHY_LINK_OFF);

wizchip_setnetinfo(&netInfo);
delay_cnt(10000);
wizchip_getnetinfo(&getnetInfo);

Ch_Version = WIZCHIP_READ(VERSIONR);
```
>
> }

Here are my logic analyzer outputs for writing and reading the MAC address.

Writing:

[![settingMAC](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/a/a0d0a1b391b06dfb5510c3e4b94bdab49dd41e67.png) settingMAC1916×547 35.4 KB](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/a/a0d0a1b391b06dfb5510c3e4b94bdab49dd41e67.png)

Reading:

[![gettingMAC](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/c/c18b6013d52b434dd87548cacd4d172131fe9ad2.png) gettingMAC1680×519 29.9 KB](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/c/c18b6013d52b434dd87548cacd4d172131fe9ad2.png)

Reading VERSIONR = 0x01

![image](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/7/70292bab3cf7b85eb4ee505b3189f73e12c61049.png)

I am new to implementing these modules so any help on where I have gone wrong or what my next steps should be would be appreciated.

## Replies

### Reply 1 by sarah.dellanno, 2022-09-27

I have realized the CS is resetting early which is being controlled by the master. Would this master spi setting be specific to my MCU or is there a general recommended setup for the master?

### Reply 2 by Eugeny, 2022-09-27 (in reply to reply 1)

Not sure I get your question. There’s standard specification for the SPI, as well as some details in the datasheet, e.g.

> All bits are synchronized with the falling edge of the SCLK

therefore, logically, you must wait a little after last falling edge before deactivating the chip select. How long you wait - depends on the clock speed and properties of the SPI bus - your goal is to have reliable start and finish of the SPI communication.

### Reply 3 by cq td, 2023-01-13

Hi Eugeny，
I have the same problem，and there is enough time(a few microseconds)after last falling edge before deactivating the chip select.
Regardless of reading any register， W5500 response: 0x01 0x02 0x03 0x00 0x00 …，Are there other possible reasons？

### Reply 4 by Eugeny, 2023-01-13

This means data you read is 0x01 0x02 0x03 **0x00 0x00** … If you have problem, please create new thread and expain the problem.

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Source: https://maker.wiznet.io/forum/14661