---
title: "W3150A+ VHDL/Verilog behavioural simulation model"
url: "https://maker.wiznet.io/forum/13806"
markdown_url: "https://maker.wiznet.io/forum/13806/md"
type: "Forum topic"
category: "Ethernet Chips"
author: "marco"
created: "2020-05-04T08:59:14+09:00"
last_activity: "2020-05-06T00:11:05+09:00"
language: "en"
views: 254
replies: 1
source: "WIZnet Makers forum (https://maker.wiznet.io/forum/)"
---

# W3150A+ VHDL/Verilog behavioural simulation model

## Question

Asked by marco on 2020-05-04 in Ethernet Chips.

Hello,
I’m developing a VHDL module to manage the W3150A+ chip in order to implement a TCP/IP protocol based link between an FPGA and a remote PC. The FPGA would act as a server and the remote PC as a client. In order to simulate the behaviour of my module I would like to know if exists a behavioural VHDL or Verilog simulation model of the chip that can be used with common hdl simulators like Modelsim or Active-HDL.
Many Thanks,
Marco

## Replies

### Reply 1 by irina, 2020-05-06

I’m sorry, we don’t support the simulation model of VHDL or verilog HDL .

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Source: https://maker.wiznet.io/forum/13806