--- title: "W5500 tcp connection problem" url: "https://maker.wiznet.io/forum/13725" markdown_url: "https://maker.wiznet.io/forum/13725/md" type: "Forum topic" category: "Ethernet Chips" author: "Zack1" created: "2020-03-02T05:26:13+09:00" last_activity: "2020-06-03T20:27:34+09:00" language: "en" views: 1315 replies: 25 source: "WIZnet Makers forum (https://maker.wiznet.io/forum/)" --- # W5500 tcp connection problem ## Question Asked by Zack1 on 2020-03-02 in Ethernet Chips. hello, I have been working with W5500 for a while for my project . I have succeeded in initializing the chip after a while. Now I am stuck at the TCP connection problem. I am trying to make the W5500 chip as server and make connection . The issue is that i am stuck at the socket_listen State, I did all the things as per data sheet and related forum discussion.i will post my code bellow ## Replies ### Reply 1 by Zack1, 2020-03-02 ``` main { spi_data[0] = 0x00; //# spi_data[1] = 0x39; //# spi_data[2] = 0x00; //# spi_data[3] = 0x00; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<4;i++) //# { //# reading version register value (0x04) SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(29); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# version_data = SpiaRegs.SPIDAT; //# DELAY_US(10); // Reading PHYCFGR reg spi_data[0] = 0x00; //# spi_data[1] = 0x2E; //# spi_data[2] = 0x00; //# spi_data[3] = 0x00; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<4;i++) //# { //# Reading PHYCFGR reg SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(29); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# phy_data = SpiaRegs.SPIDAT; //# DELAY_US(10); //# // Writing MR register for internal register initialization spi_data[0] = 0x00; //# spi_data[1] = 0x00; //# spi_data[2] = 0x04; //# spi_data[3] = 0x80; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<4;i++) //# Writing MR register for internal register initialization { //# SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(29); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# DELAY_US(80); // Reading MR register for internal register initialization spi_data[0] = 0x00; //# spi_data[1] = 0x00; //# spi_data[2] = 0x00; //# spi_data[3] = 0x00; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<4;i++) //# Reading MR register for internal register initialization { //# SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(29); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# Mr_status = SpiaRegs.SPIDAT; //# DELAY_US(10); //# //Writing GAR Gar_data[0] = 0x00; //# Gar_data[1] = 0x01; //# Gar_data[2] = 0x04; //# Gar_data[3] = 0xC0; //# Gar_data[4] = 0xA8; //# Gar_data[5] = 0x00; //# Gar_data[6] = 0x01; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# Writing GAR for (i=0;i<7;i++) //# { //# SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# // rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(49); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# DELAY_US(10); //Reading GAR register /*Gar_data[0] = 0x00; //# Gar_data[1] = 0x01; //# Gar_data[2] = 0x00; //# Gar_data[3] = 0x00; //# Gar_data[4] = 0x00; //# Gar_data[5] = 0x00; //# Gar_data[6] = 0x00; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<7;i++) //# Reading GAR register { //# SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(49); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# GAR_data = SpiaRegs.SPIDAT; DELAY_US(10);*/ //Writing SUBR reg Gar_data[0] = 0x00; //# Gar_data[1] = 0x05; //# Gar_data[2] = 0x04; //# Gar_data[3] = 0xFF; //# Gar_data[4] = 0xFF; //# Gar_data[5] = 0xFF; //# Gar_data[6] = 0x00; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<7;i++) //# Writing SUBR reg { //# SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(49); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# DELAY_US(10); //Writing SHAR reg SHAR_data[0] = 0x00; //# SHAR_data[1] = 0x09; //# SHAR_data[2] = 0x04; //# SHAR_data[3] = 0x00; //# SHAR_data[4] = 0x08; //# SHAR_data[5] = 0xDC; //# SHAR_data[6] = 0x01; //# SHAR_data[7] = 0x02; //# SHAR_data[8] = 0x03; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# Writing SHAR reg for (i=0;i<9;i++) //# { //# SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(59); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# DELAY_US(10); // WRITING Sipr Register Gar_data[0] = 0x00; //# Gar_data[1] = 0x0F; //# Gar_data[2] = 0x04; //# Gar_data[3] = 0xC0; //192 //# Gar_data[4] = 0xA8; //168 //# Gar_data[5] = 0x01; //1 //# Gar_data[6] = 0x02; //2 //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<7;i++) //# WRITING Sipr Register { //# SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(49); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# //# DELAY_US(10); //# // Writing Sn_Mr register spi_data[0] = 0x00; //# spi_data[1] = 0x00; //# spi_data[2] = 0x0C; //# spi_data[3] = 0x21; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<4;i++) //# { //# Socket n mode register(0001) SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(29); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# //# DELAY_US(10); // Sn_Port register port[0] = 0x00; //# port[1] = 0x04; //# port[2] = 0x0C; //# port[3] = 0x13; //# port[4] = 0x88; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<5;i++) //# { //# source port num SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(38); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# //# DELAY_US(10); //open command Sn_Cr register spi_data[0] = 0x00; //# spi_data[1] = 0x01; //# spi_data[2] = 0x0C; //# spi_data[3] = 0x01; //open command //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<4;i++) //# { //# open command SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(29); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# //# DELAY_US(80); //reading status register spi_data[0] = 0x00; //# spi_data[1] = 0x03; //# spi_data[2] = 0x08; //# spi_data[3] = 0x00; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<4;i++) //# { //# reading status reg SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# expected value (0x13) {Sock_init} } //# //# //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(29); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# status = SpiaRegs.SPIDAT; //# DELAY_US(10); while(status != 0x13); // reading command register spi_data[0] = 0x00; //# spi_data[1] = 0x01; //# spi_data[2] = 0x08; //# spi_data[3] = 0x00; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<4;i++) //# { //# reading command reg SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# expected value (0x00) } //# //# //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(29); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# cmdRegStat = SpiaRegs.SPIDAT; //# DELAY_US(10); // Reading PHYCFGR reg spi_data[0] = 0x00; //# spi_data[1] = 0x2E; //# spi_data[2] = 0x00; //# spi_data[3] = 0x00; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<4;i++) //# { //# Reading PHYCFGR reg SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(29); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# phy_data = SpiaRegs.SPIDAT; //# DELAY_US(10); //# //Set destionation Ip address ################################################### /* Dest_IP[0] = 0x00; //# Dest_IP[1] = 0x0F; //# Dest_IP[2] = 0x0C; //# Dest_IP[3] = 0xC0; //# Dest_IP[4] = 0xA8; //# Dest_IP[5] = 0x01; //# Dest_IP[6] = 0x01; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<7;i++) //# WRITING DESTIP Register { //# SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(49); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# //# DELAY_US(10); //Set Destination port num ######################################################## port[0] = 0x00; //# port[1] = 0x10; //# port[2] = 0x0C; //# port[3] = 0x13; //# port[4] = 0x88; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<5;i++) //# { //# destination port num SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# } //# //# rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(38); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# //# DELAY_US(10);*/ // listen/connect command register (Sn_CR) spi_data[0] = 0x00; //# @@@@@@@@@@ spi_data[1] = 0x01; //# @ @ spi_data[2] = 0x0C; //# @ @ spi_data[3] = 0x02; //# @ @ GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# @ @ for (i=0;i<4;i++) //# @ @ { //# writing listen 0x02(server)/ SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# connect(0x04)(client) command to } //#Command register @ //# @ @ //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# @ @ //# @ @ DELAY_US(29); //# @ @ GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# @ @ //# @@@@@@@@@@ DELAY_US(800000); // reading command register spi_data[0] = 0x00; //# spi_data[1] = 0x01; //# spi_data[2] = 0x08; //# spi_data[3] = 0x00; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<4;i++) //# { //# reading command reg SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# expected value (0x00) } //# //# // rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(29); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# cmdRegStat_aft = SpiaRegs.SPIDAT; //# DELAY_US(10); status_2 = SpiaRegs.SPIDAT; // Read Status register while (status_listen != 0x17) { spi_data[0] = 0x00; //# spi_data[1] = 0x03; //# spi_data[2] = 0x08; //# spi_data[3] = 0x00; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<4;i++) //# { //# reading status reg SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# expected value (0x14) {listen} } //# //# //rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(29); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# status_listen = SpiaRegs.SPIDAT; //# DELAY_US(10); } // while (status_listen != 0x17) // wait for connection establishment // reading interupt register spi_data[0] = 0x00; //# spi_data[1] = 0x02; //# spi_data[2] = 0x08; //# spi_data[3] = 0x00; //# GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; //cs low //# for (i=0;i<4;i++) //# { //# reading interrupt reg SpiaRegs.SPITXBUF = (spi_data[i]<<8); //send frame //# expected value (##) {listen} } //# //# // rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(29); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# int_stat = SpiaRegs.SPIDAT; //# DELAY_US(10); //if () // loop ends } //main ends ``` ### Reply 2 by Zack1, 2020-03-02 ![](https://avatars.discourse-cdn.com/v4/letter/z/e8c25b/48.png) Zack1: > ``` } //# //# // rdata =(SpiaRegs.SPIRXBUF>>8); //recieve data //# //# DELAY_US(29); //# GpioDataRegs.GPBSET.bit.GPIO57 = 1; //# int_stat = SpiaRegs.SPIDAT; //# DELAY_US(10); //if () ``` > > // loop ends > > } //main ends somebody do help as soon as possible ### Reply 3 by Zack1, 2020-03-02 [@becky](https://maker.wiznet.io/u/becky) Hello. I see you have edited the code in the notification. What change did you make? ### Reply 4 by becky, 2020-03-03 (in reply to reply 3) ![image](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/b/b86a6b8429afeedb73623ae1aa0df45b62eb52f6.png) I applied this to your code. It makes the code readable. ### Reply 5 by becky, 2020-03-03 (in reply to reply 1) read - VERSIONR read - PHYCFGR write - MR (0x80) read - MR write - GAR(192 168 0 1) read - GAR write - SUBR ( 255 255 255 0) write - SHAR (0x00 0x08 0xdc 0x01 0x02 0x03) write - SIPR (192 168 1 2) write - Sn_MR (0x21) write - Sn_Port(0x13 0x88) write - Sn_CR(0x01) read - Sn_SR read - Sn_CR read - PHYCFGR write - Sn_DIPR(192 168 1 1) write - Sn_DPORT(0x13 0x88) write - Sn_CR(0x02) read - Sn_CR read - Sn_SR read - Sn_IR --- I have summarized your code as above. But this took too long. It would be nice to show it in pseudocode for easy viewing. You do not need to fill in Socket Destination IP and Socket Destination Port when using W5500 as a server. This is a register for connecting to the server when in client mode. Please refer to image. [![image](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/d/d6009a3a53f6e0ab5eb9c5f16cc71bd0a66fdf6d.png) image607×842 65.2 KB](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/d/d6009a3a53f6e0ab5eb9c5f16cc71bd0a66fdf6d.png) However, writing a Destination does not cause problems when running in server mode. I think your problem is that the gateway address is 192.168.0.1 and the source IP address is 192.168.1.2. This is not the right network bandwidth. Match the network bandwidth of the two addresses. The same applies to the network bandwidth of the client, and the gateway address and the client address must not be the same. ### Reply 6 by Zack1, 2020-03-03 [@becky](https://maker.wiznet.io/u/becky) Thanks for the help sir. And sorry for the inconvenience caused , i was able to solve the issue for now, i was able to establish the connection.(Mistake was with an array name) But through herculese only. My code gets stuck at the Listen state, and only after using herculese the conection gets established. I dont know why its doesnot work with the code. Another doubt is regarding the Sn_TXBUF_SIZE , Sn_TX_FSR, Sn_TX_RD ,do these registers belongs to the Socket 0 Register or the Socket 0 TX Buffer. Doubt arised as i was tring to send some 8 byte data am getting so many junk values along with the data ### Reply 7 by Zack1, 2020-03-03 [@becky](https://maker.wiznet.io/u/becky) Sir , It would be a great help if you could help me clear these things for me. For sending data , i believe the steps are like this right, 1. Configure the Size of TX_Buffer 2. Read the Starting Offset address from TX_RD, for writing Tx_data to TX buff 3. Check the data to be written is less than or equal to the free size. 4. Write data to Tx_Buffer 5. Write the Number of bytes of transmitting data to TX_WR.(if i am sending a 8 byte data for the test purpose do i write value 0x0008 to the TX_WR?) 6. Issue Send Command. ### Reply 8 by Zack1, 2020-03-03 [@becky](https://maker.wiznet.io/u/becky) By doing so am able transmit data but am getting so many junk values along with data. and Large number of packets are being send. ### Reply 9 by Zack1, 2020-03-03 [![1](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/4/4682e424b9d350d1dbdca32a52a5b4be63c29611.jpeg) 11024×600 226 KB](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/4/4682e424b9d350d1dbdca32a52a5b4be63c29611.jpeg) [![2](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/0/02aaeab20cfda4c22c9e4669c11e7b2f8e03577f.jpeg) 21024×600 216 KB](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/0/02aaeab20cfda4c22c9e4669c11e7b2f8e03577f.jpeg) [![3](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/0/02ffaad98dcc7da070c7512e4d4d91b51169d6b1.jpeg) 31024×600 217 KB](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/0/02ffaad98dcc7da070c7512e4d4d91b51169d6b1.jpeg) [![4](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/0/078dfe5674fafbde0bd2a2eb5d36f11955bc4bcc.jpeg) 41024×600 208 KB](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/0/078dfe5674fafbde0bd2a2eb5d36f11955bc4bcc.jpeg) this is the data captured. as you can see i have send " AA AA AA AA AA AA AA" as data for a single time. But am getting data of length 1460 3 times and 1 packet of 629. 4 images are of 4 packets. I wrote the value for TX_WR as 0x07 as am sending 7 bytes. and data writing offset address which i got from TX_RD reg ### Reply 10 by becky, 2020-03-04 ![](https://avatars.discourse-cdn.com/v4/letter/z/e8c25b/48.png) Zack1: > Thanks for the help sir. And sorry for the inconvenience caused , > i was able to solve the issue for now, i was able to establish the connection.(Mistake was with an array name) > But through herculese only. My code gets stuck at the Listen state, and only after using herculese the conection gets established. > I dont know why its doesnot work with the code. TCP Server waits for Client connection in listen state. After that, when the Client connects, it changes to Establish state. This is normal operation. ![](https://avatars.discourse-cdn.com/v4/letter/z/e8c25b/48.png) Zack1: > For sending data , i believe the steps are like this right, > > 1. Configure the Size of TX_Buffer > > 2. Read the Starting Offset address from TX_RD, for writing Tx_data to TX buff > > 3. Check the data to be written is less than or equal to the free size. > > 4. Write data to Tx_Buffer > > 5. Write the Number of bytes of transmitting data to TX_WR.(if i am sending a 8 byte data for the test purpose do i write value 0x0008 to the TX_WR?) > > 6. Issue Send Command. 2 → Read the offset address from TX_RD → Sn_TX_WR. 4 → You should calculate Write Offset Address and write data to this address(=addrsel). ``` #define WIZCHIP_TXBUF_BLOCK(N) (2+4*N) //< Socket N Tx buffer address block ptr = getSn_TX_WR(sn); addrsel = ((uint32_t)ptr << 8) + (WIZCHIP_TXBUF_BLOCK(sn) << 3); ``` 5 → Write the value increased by the amount of data to be transmitted of the existing Sn_TX_WR value. If Sn_TW WR value is 0x0070, you should write the 0x0078 to send 8byte data. ### Reply 11 by Zack1, 2020-03-04 becky: > 2 → Read the offset address from TX_RD → Sn_TX_WR. > 4 → You should calculate Write Offset Address and write data to this address(=addrsel). Sorry I didn’t get that well. Can you explain it a bit more,? For you information am not using the IO library. Did u mean to Read the Offset address from the TX_RD and write the address as the starting address to the TX_BUFFER register? And I am getting same values from TX_RD and TX_WR, is this normal? ### Reply 12 by Zack1, 2020-03-05 W5500 data sheet is so incomplete that i have to depend on the forum for simple doubts and that too takes days to get replay ### Reply 13 by becky, 2020-03-05 Sorry. Please refer to ioLibrary Driver. [github.com](https://github.com/Wiznet/ioLibrary_Driver/blob/master/Ethernet/W5500/w5500.c) #### [Wiznet/ioLibrary_Driver/blob/master/Ethernet/W5500/w5500.c](https://github.com/Wiznet/ioLibrary_Driver/blob/master/Ethernet/W5500/w5500.c) ``` //***************************************************************************** // //! \file w5500.c //! \brief W5500 HAL Interface. //! \version 1.0.2 //! \date 2013/10/21 //! \par Revision history //! <2015/02/05> Notice //! The version history is not updated after this point. //! Download the latest version directly from GitHub. Please visit the our GitHub repository for ioLibrary. //! >> https://github.com/Wiznet/ioLibrary_Driver //! <2014/05/01> V1.0.2 //! 1. Implicit type casting -> Explicit type casting. Refer to M20140501 //! Fixed the problem on porting into under 32bit MCU //! Issued by Mathias ClauBen, wizwiki forum ID Think01 and bobh //! Thank for your interesting and serious advices. //! <2013/12/20> V1.0.1 //! 1. Remove warning //! 2. WIZCHIP_READ_BUF WIZCHIP_WRITE_BUF in case _WIZCHIP_IO_MODE_SPI_FDM_ //! for loop optimized(removed). refer to M20131220 ``` This file has been truncated. [show original](https://github.com/Wiznet/ioLibrary_Driver/blob/master/Ethernet/W5500/w5500.c) ![image](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/2/2a0d4ccf3e1ec50755ad5ebd627bc357ab43d93e.png) ### Reply 14 by becky, 2020-03-05 ![](https://avatars.discourse-cdn.com/v4/letter/z/e8c25b/48.png) Zack1: > Did u mean to Read the Offset address from the TX_RD and write the address as the starting address to the TX_BUFFER register? You should read the Sn_TX_WR to get offset address. Sn_TX_RD is not. ![](https://avatars.discourse-cdn.com/v4/letter/z/e8c25b/48.png) Zack1: > And I am getting same values from TX_RD and TX_WR, is this normal? If you increase the value to send data to Sn_TX_WR and set a send command and complete to sending data, Sn_TX_RD is automatically incremented and equal to Sn_TX_WR. ### Reply 15 by Zack1, 2020-03-05 becky: > gSn_TX_BASE What is Sn_TX_BASE, I don’t see there is such a register. i did Read the TX_WR ( i believe this is the offset address ) And to calculate the write start address , i believe this must be added with the TX_BASE you said, right?! And I didnt understand what TX_Base. ### Reply 16 by Zack1, 2020-03-05 After socket connection got established. I did like this. 1. Read TX_WR register , assume the value be (0x43E8) 2. Write data to the TX_Buffer with adress as (0x43E8) and Control Phase as 0x14, am Writing a 3 byte data 3. Increment the value as 0x43E8 + 0x03 4. Write the incremented value to TX_WR register. 5. Issue the SEND command. 6. Wait for the command to be executed. Am able to send data , but monitoring through wire shark is give me data along with junk value, insted of 8 byte data am getting like 4 packets of 1460 bytes. Where in the first packet required data is at the staring of data byte , and going to inner on other packets ### Reply 17 by becky, 2020-03-06 ![](https://avatars.discourse-cdn.com/v4/letter/z/e8c25b/48.png) Zack1: > What is Sn_TX_BASE, I don’t see there is such a register. Sorry this is about w5100s and I’m confused. ![](https://avatars.discourse-cdn.com/v4/letter/z/e8c25b/48.png) Zack1: > After socket connection got established. I did like this. > > 1. Read TX_WR register , assume the value be (0x43E8) > > 2. Write data to the TX_Buffer with adress as (0x43E8) and Control Phase as 0x14, am Writing a 3 byte data > > 3. Increment the value as 0x43E8 + 0x03 > > 4. Write the incremented value to TX_WR register. > > 5. Issue the SEND command. > > 6. Wait for the command to be executed. This is correct. Thank you. ### Reply 18 by Zack1, 2020-03-06 (in reply to reply 16) ![](https://avatars.discourse-cdn.com/v4/letter/z/e8c25b/48.png) Zack1: > Am able to send data , but monitoring through wire shark is give me data along with junk value, insted of 8 byte data am getting like 4 packets of 1460 bytes. Where in the first packet required data is at the staring of data byte , and going to inner on other packets and why is this happening you think? [@becky](https://maker.wiznet.io/u/becky) [@Eugeny](https://maker.wiznet.io/u/eugeny) [@irina_kim](https://maker.wiznet.io/u/irina_kim) ?? anyone? ### Reply 19 by becky, 2020-03-06 I think it’s because you wrote 0x0008 in Sn_TX_WR. The length of data is calculated by the difference between Sn_TX_WR and Sn_TX_RD. So if the Sn_TX_WR(=Sn_TX_RD) value is 0xe937 and you write 0x0008 to Sn_TX_WR, the 0x16d0 bytes of data (1460x4), which is the difference between 0x0008 and 0xe937, be sent. ### Reply 20 by Zack1, 2020-03-06 ok [@becky](https://maker.wiznet.io/u/becky), i understood you clearly. but as of now am not writing 0x0008, The value being passed to the TX_WR now is actually TX_WR + 0x03 , which is the data length am sending now! And am getting same values for TX_WR and TX_RD ### Reply 21 by becky, 2020-03-06 The process you mentioned above is correct. If you still have symptoms, I do not know why. So please attach your code. I want to check it. ### Reply 22 by Eugeny, 2020-03-06 ![](https://avatars.discourse-cdn.com/v4/letter/z/e8c25b/48.png) Zack1: > And am getting same values for TX_WR and TX_RD As I know it is normal (I use W5100 though). You read TX_WR, then you increment it by number of bytes you want to send (0x03 in your case), and write the resulting value back to TX_WR. Until SEND command completes, you read original value of TX_WR from the register. Only after SEND command completes, it changes to TX_WR+0x03. I caught this “problem” when trying to accumulate data in the TX buffer by placing chars into TX buffer and increasing value of TX_WR without issuing SEND command. Unfortunately, this does not work as next TX_WR always reads original value if SEND command was not issued. ### Reply 23 by Zack1, 2020-03-06 [@Eugeny](https://maker.wiznet.io/u/eugeny) [@becky](https://maker.wiznet.io/u/becky) Thanks for the help . The issue is solved for now, and am getting the data as required. The problem was with chip select duration. For one of the frame chip select was turning high before the completion of data transmission. i will post my entire code here, as it could help someone in the future. Am not using the IO lib , am communicating with SPI frame as mentioned for W5500. [codefinal1.zip](https://maker.wiznet.io/forum/legacyFile.asp?path=gUEdj9k88ihILutQxL03KsBkGpV.zip) (132.6 KB) ### Reply 24 by susan56, 2020-04-09 Even I too have the same query.I want to include that I unable to fix the location of my HP laptop.I have contacted the helpdesk support [garmin map updates free download 2019](https://mapsupdates.org/garmin-map-updates-free-download/) .I have followed out all the manuals as suggested by the team such as follows: Go to Start > Settings > Privacy > Location. Secondly,Under Default location, select Set default. The Windows Maps app will open. Follow the instructions to change your default location. Suggest us if anything else we need to include. ### Reply 25 by cellkey, 2020-06-03 Hi, this calculation is not understood… --- Source: https://maker.wiznet.io/forum/13725