--- title: "Spi to ethernet communication." url: "https://maker.wiznet.io/forum/13623" markdown_url: "https://maker.wiznet.io/forum/13623/md" type: "Forum topic" category: "Ethernet Chips" author: "soorajsuresh80" created: "2019-12-31T08:40:41+09:00" last_activity: "2020-01-30T00:52:33+09:00" language: "en" views: 5082 replies: 26 source: "WIZnet Makers forum (https://maker.wiznet.io/forum/)" --- # Spi to ethernet communication. ## Question Asked by soorajsuresh80 on 2019-12-31 in Ethernet Chips. Hello, We are using the W5500 chip for the spi to Ethernet communication in our project. And i have some doubts regarding the programming of the chip. Do the chip (w5500) requires additional programming? or the spi frame send from the master configures the whole process of the chip? For getting the spi data through the ethernet what all configurations are required? can you explain the basic configurations required with a pseudo code or a flow chart? And whats is the default spi baud rate of the W5500 EVB? if to be changed how can i change the baud rate. Please don’t reply with the library file link on github. ## Replies ### Reply 1 by irina, 2020-01-02 First, please let me know what use our product name you use. For example, just use W5500 Chip or use W5500 EVB If you use the W5500 EVB , you just compile the project that we support project via github and download the firmware. If you configure the board with W5500, you must send the data as SPI frame of W5500 from MCU. ### Reply 2 by soorajsuresh80, 2020-01-02 (in reply to reply 1) hello irina , thanks for the reply. Right now i have the W5500 EVB and AOKIN ethernet network module with me . my only aim is to get the spi data(From another MCU (tms320f28335)) over the ethernet, and monitor it through wire shark. ### Reply 3 by becky, 2020-01-02 The W5500’s SPI supports 80 MHz speed What Ethernet communication do you want? First, you should connect SPI with MCU. And set the Source Network information . [![image](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/a/a6c62488f51401721723f0a7a862f75858659f4b.png) image210×578 13.7 KB](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/a/a6c62488f51401721723f0a7a862f75858659f4b.png) Also set the socket communication. please refer to 4.3.1, 4.3.2 and 4.4.1 of W5100S data sheet. [![image](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/7/71e8058ccc505f1a1f903f372c53ca93aef1ac70.png) image656×594 53.7 KB](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/7/71e8058ccc505f1a1f903f372c53ca93aef1ac70.png) ### Reply 4 by soorajsuresh80, 2020-01-02 correct me if i am wrong, as per what i undrstood from the data sheet to establish the spi communication and get the data over the ethernet we need to send the data as per the spi frame of the W5500. And this frame is what configures the w5500 . so that should be like this right? first send the frame with the control bit and address phase selecting the Common register and set the ip mac and stuff there. secondly, send other frame with address phase and control phase selecting socket register for protocol slection and all?? is that the way??? ### Reply 5 by teddy, 2020-01-02 If you have W5500 EVB, did you execute the examples code? and did you succeed for example code? what’s the example code you execute? did you configure SPI? did you initialize w5500? EX) void SPI_Init() { ``` /* SSP initialization */ Init_SSP_PinMux(); Chip_SSP_Init(LPC_SSP0); Chip_SSP_SetFormat(LPC_SSP0, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_MODE0); Chip_SSP_SetMaster(LPC_SSP0, true); Chip_SSP_SetBitRate(LPC_SSP0, 10000000); // 10MHz Chip_SSP_Enable(LPC_SSP0); ``` } void W5500_Init() { ``` uint8_t tmp; uint8_t memsize[2][8] = { { 2, 2, 2, 2, 2, 2, 2, 2 }, { 2, 2, 2, 2, 2, 2, 2, 2 } }; Chip_GPIO_SetPinState(LPC_GPIO, 0, 2, true); // SSEL(CS) Chip_GPIO_SetPinState(LPC_GPIO, 0, 22, false); // N_RESET tmp = 0xFF; while(tmp--); Chip_GPIO_SetPinState(LPC_GPIO, 0, 22, true); // N_RESET reg_wizchip_cs_cbfunc(wizchip_select, wizchip_deselect); reg_wizchip_spi_cbfunc(wizchip_read, wizchip_write); /* wizchip initialize*/ if (ctlwizchip(CW_INIT_WIZCHIP, (void*) memsize) == -1) { printf("WIZCHIP Initialized fail.\r\n"); while (1); } ``` } ### Reply 6 by teddy, 2020-01-02 If you succeed SPI initialize or W5500 initialize, you will read VERSIONR resister. what is VERSIONR resister value? VERSIONR resister value must be 0x04. [![image](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/f/f3d75ba9c85aa169f71f7f3ffdbc9d51381ab6a1.png) image671×753 87.6 KB](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/f/f3d75ba9c85aa169f71f7f3ffdbc9d51381ab6a1.png) ![image](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/1/13bf0c4b0db0897325d2a87068250b14b0faca97.png) ### Reply 7 by soorajsuresh80, 2020-01-06 (in reply to reply 3) Hello Thanks becky, let me try it out. Can u please tell what baud rate should i use? You said 80Mhz right? How much bits per second is 80MHz? ### Reply 8 by irina, 2020-01-07 ![](https://avatars.discourse-cdn.com/v4/letter/t/da6949/48.png) teddy: > If you have W5500 EVB, did you execute the examples code? > and did you succeed for example code? > what’s the example code you execute? > > did you configure SPI? > did you initialize w5500? Could you please answer me about above question? 80Mhz means SPI Clock that it send from SPI master. Therefore, it is different with SPI baud rate and it is just SPI clock speed. For example, For reading the version register in W5500, it need the 32bits. Assuming no delay between bit, the calculation is as follows. `1/80MHz *32bits = 12.5ns*32 =400ns Even though theoretical design speed is 80MHz, the signal in the high speed may be distorted because of the circuit crosstalk and the length of the signal line. The minimum guaranteed speed of the SCLK is 33.3 MHz which was tested and measured with the stable waveform. Please refer to the SPI Application Note which shows the WIZnet test environment and results. ### Reply 9 by soorajsuresh80, 2020-01-08 this is the code i wrote for the spi communication from tms320f28335 to w5500 spi to ethernet module. please check if the code is correct and correct me if i am wrong . if am wrong please help me with a pseudo code for the same //########################################################################### #include “DSP28x_Project.h” // Device Headerfile and Examples Include File // Prototype statements for functions found within this file. // __interrupt void ISRTimer2(void); typedef unsigned char uint8; void delay_loop(void); void spi_xmit(uint8 a); void spi_fifo_init(void); void spi_init(void); void error(void); void netwrkconfig(void); void socketinit(void); void portnum(void); void opencmd(void); void listencmd(void); void txdata(void); void sendcmd(void); uint8 sdata; void main(void) { // send data //Uint16 rdata; // received data // Step 1. Initialize System Control: // PLL, WatchDog, enable Peripheral Clocks InitSysCtrl(); // Step 2. Initialize GPIO: // InitSpiaGpio(); // Step 3. Clear all interrupts and initialize PIE vector table: // Disable CPU interrupts DINT; // Initialize PIE control registers to their default state. // The default state is all PIE interrupts disabled and flags // are cleared. // This function is found in the DSP2833x_PieCtrl.c file. InitPieCtrl(); // Disable CPU interrupts and clear all CPU interrupt flags: IER = 0x0000; IFR = 0x0000; // Initialize the PIE vector table with pointers to the shell Interrupt // Service Routines (ISR). // The shell ISR routines are found in DSP2833x_DefaultIsr.c. // This function is found in DSP2833x_PieVect.c. InitPieVectTable(); // Step 4. Initialize all the Device Peripherals: // This function is found in DSP2833x_InitPeripherals.c spi_fifo_init(); // Initialize the Spi FIFO spi_init(); // init SPI // Step 5. User specific code: // Interrupts are not used in this example. for(;![:wink:](https://emoji.discourse-cdn.com/twitter/wink.png?v=12) { // Transmit data ``` GpioDataRegs.GPBCLEAR.bit.GPIO57 =1; // SCS asserted low for data transmission netwrkconfig(); GpioDataRegs.GPBSET.bit.GPIO57 = 1; // SCS asserted high to inidcate end of the frame. GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; socketinit(); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 =1; portnum(); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; opencmd(); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; listencmd (); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; txdata (); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; sendcmd (); GpioDataRegs.GPBSET.bit.GPIO57 = 1; // Wait until data is received //while(SpiaRegs.SPIFFRX.bit.RXFFST !=1) { } // Check against sent data //rdata = SpiaRegs.SPIRXBUF; //if(rdata != sdata) error(); ``` } } // spi frame data functions: //* void netwrkconfig() { //ip address mac SUBR SHAR SIPR are set here ``` sdata = 0x00; spi_xmit(sdata); sdata = 0x00; spi_xmit(sdata); sdata = 0x01; spi_xmit(sdata); sdata = 0x04; spi_xmit(sdata); sdata = 0xC0; spi_xmit(sdata); sdata = 0xA8; spi_xmit(sdata); sdata = 0x00; spi_xmit(sdata); sdata = 0x01; spi_xmit(sdata); sdata = 0xFF; spi_xmit(sdata); sdata = 0xFF; spi_xmit(sdata); sdata = 0xFF; spi_xmit(sdata); sdata = 0x00; spi_xmit(sdata); sdata = 0x00; spi_xmit(sdata); sdata = 0x08; spi_xmit(sdata); sdata = 0xDC; spi_xmit(sdata); sdata = 0x01; spi_xmit(sdata); sdata = 0x02; spi_xmit(sdata); sdata = 0x03; spi_xmit(sdata); sdata = 0xC0; spi_xmit(sdata); sdata = 0xA8; spi_xmit(sdata); sdata = 0x00; spi_xmit(sdata); sdata = 0x02; spi_xmit(sdata); ``` } //=========================================================================== // * void socketinit() { // Sn3_MR reg sdata = 0x0; spi_xmit(sdata); ``` sdata = 0x0; spi_xmit(sdata); sdata = 0x04; spi_xmit(sdata); sdata = 0x01; spi_xmit(sdata); ``` } void portnum() { //Sn_PORT sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x04; spi_xmit(sdata); sdata = 0x0C; spi_xmit(sdata); sdata = 0x13; spi_xmit(sdata); sdata = 0x88; spi_xmit(sdata); ``` } void opencmd() { //Sn_CR reg sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x01; spi_xmit(sdata); sdata = 0x0C; spi_xmit(sdata); sdata = 0x01; spi_xmit(sdata); ``` } void listencmd () { //Sn_CR sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x01; spi_xmit(sdata); sdata = 0x0C; spi_xmit(sdata); sdata = 0x02; spi_xmit(sdata); ``` } //*** void txdata () { sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x00; spi_xmit(sdata); sdata = 0x14; spi_xmit(sdata); sdata = 0xAA; spi_xmit(sdata); sdata = 0xAA; spi_xmit(sdata); ``` } //* void sendcmd() { sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x01; spi_xmit(sdata); sdata = 0x0C; spi_xmit(sdata); sdata = 0x20; spi_xmit(sdata); ``` } // Step 7. Insert all local Interrupt Service Routines (ISRs) and functions here: void delay_loop() { long i; for (i = 0; i < 1000000; i++) {} } void error(void) { __asm(" ESTOP0"); // Test failed!! Stop! for (;;); } void spi_init() { SpiaRegs.SPICCR.all =0x000F; // Reset on, rising edge, 16-bit char bits SpiaRegs.SPICTL.all =0x0006; // Enable master mode, normal phase, // enable talk, and SPI int disabled. SpiaRegs.SPIBRR =0x007F; SpiaRegs.SPICCR.all =0x009F; // Relinquish SPI from Reset SpiaRegs.SPIPRI.bit.FREE = 1; // Set so breakpoints don’t disturb xmission } void spi_xmit(uint8 a) { SpiaRegs.SPITXBUF=a; } void spi_fifo_init() { // Initialize SPI FIFO registers SpiaRegs.SPIFFTX.all=0xE040; SpiaRegs.SPIFFRX.all=0x204f; SpiaRegs.SPIFFCT.all=0x0; } //=========================================================================== // No more. //=========================================================================== ### Reply 10 by teddy, 2020-01-09 (in reply to reply 9) hello Why you didn’t use iolibrary for WIZNET? why config and init functions are in the loop? You didn’t initialize W5500. you write wizchip_select() for CS set and reset functions. and you write wizchip_read(), wizchip_write for SPI read& write data functions. please, check this code. [github.com](https://github.com/Wiznet/HTTPServer_LPC11E36_LPCXpresso/blob/cf46841a39f8d189be400f612030ccdf343750bc/HTTPServer_LPC11E36_LPCXpresso/src/w5500_init.c#L21) #### [Wiznet/HTTPServer_LPC11E36_LPCXpresso/blob/cf46841a39f8d189be400f612030ccdf343750bc/HTTPServer_LPC11E36_LPCXpresso/src/w5500_init.c#L21](https://github.com/Wiznet/HTTPServer_LPC11E36_LPCXpresso/blob/cf46841a39f8d189be400f612030ccdf343750bc/HTTPServer_LPC11E36_LPCXpresso/src/w5500_init.c#L21) ``` 1. } - 2. static void wizchip_deselect(void) 3. { 4. Chip_GPIO_SetPinState(LPC_GPIO, GPIO_SPI0_PORT, GPIO_SPI0_CS0, true); // SSEL(CS) 5. } - 6. static uint8_t wizchip_read() 7. { 8. uint8_t rb; 9. Chip_SSP_ReadFrames_Blocking(LPC_SSP0, &rb, 1); 10. return rb; 11. } - 12. static void wizchip_write(uint8_t wb) 13. { 14. Chip_SSP_WriteFrames_Blocking(LPC_SSP0, &wb, 1); 15. } - 16. static void wizchip_readburst(uint8_t* pBuf, uint16_t len) 17. { ``` thank you ### Reply 11 by soorajsuresh80, 2020-01-09 ![](https://avatars.discourse-cdn.com/v4/letter/t/da6949/48.png) teddy: > Why you didn’t use iolibrary for WIZNET? Hello, Am using the Ti’s tms320f28335 as Master . and i think no such library are available for that. If so there must a way to init and configure the w5500 right?? ### Reply 12 by irina, 2020-01-09 (in reply to reply 9) ![](https://avatars.discourse-cdn.com/v4/letter/s/53a042/48.png) soorajsuresh80: > sdata = 0xC0; spi_xmit(sdata); sdata = 0xA8; spi_xmit(sdata); sdata = 0x00; spi_xmit(sdata); sdata = 0x02; spi_xmit(sdata); I think this data is 192.168.0.2 as SIPR, is it right? If yes,where is the address of SIPR in code? Also the ioLibrary isn’t dependent on the MCU and I don’t think you have any problem. If you can’t use the ioLibrary, MCU should send data to W5500 SPI frame. ![image](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/6/6800e152ec4b1e6775dc205cfd99621e92051dd3.png) Further details refer to datasheet : [W5500 Datasheet](https://wizwiki.net/wiki/lib/exe/fetch.php/products:w5500:w5500_ds_v109e.pdf) ### Reply 13 by soorajsuresh80, 2020-01-09 irina_kim: > If yes,where is the address of SIPR in code? as the address is auto incremented for each data , i gave only the starting address of GAR. (my mistake ). as of now i changed that. and made some more modifications in the code. I’ll post code below please check if any changes is required. ### Reply 14 by soorajsuresh80, 2020-01-09 irina_kim: > If yes,where is the address of SIPR in code? void main(void) { // send data //Uint16 rdata; // received data // Step 1. Initialize System Control: // PLL, WatchDog, enable Peripheral Clocks InitSysCtrl(); // Step 2. Initialize GPIO: // InitSpiaGpio(); // Step 3. Clear all interrupts and initialize PIE vector table: // Disable CPU interrupts DINT; // Initialize PIE control registers to their default state. // The default state is all PIE interrupts disabled and flags // are cleared. // This function is found in the DSP2833x_PieCtrl.c file. InitPieCtrl(); // Disable CPU interrupts and clear all CPU interrupt flags: IER = 0x0000; IFR = 0x0000; // Initialize the PIE vector table with pointers to the shell Interrupt // Service Routines (ISR). // The shell ISR routines are found in DSP2833x_DefaultIsr.c. // This function is found in DSP2833x_PieVect.c. InitPieVectTable(); // Step 4. Initialize all the Device Peripherals: // This function is found in DSP2833x_InitPeripherals.c spi_fifo_init(); // Initialize the Spi FIFO spi_init(); // init SPI // Step 5. User specific code: // Interrupts are not used in this example. for(;![:wink:](https://emoji.discourse-cdn.com/twitter/wink.png?v=12) { // Transmit data GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; MR_reg (); GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; ``` GpioDataRegs.GPBCLEAR.bit.GPIO57 =1; // SCS asserted low for data transmission GAR(); GpioDataRegs.GPBSET.bit.GPIO57 = 1; // SCS asserted high to inidcate end of the frame. GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; SUBR(); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; SHAR(); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; SIPR(); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; Sn_MR(); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 =1; Sn_PORT(); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; opencmd(); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; Sn_DIPR(); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; Sn_DPORT(); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; listencmd (); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; txdata (); GpioDataRegs.GPBSET.bit.GPIO57 = 1; GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; sendcmd (); GpioDataRegs.GPBSET.bit.GPIO57 = 1; // Wait until data is received //while(SpiaRegs.SPIFFRX.bit.RXFFST !=1) { } // Check against sent data //rdata = SpiaRegs.SPIRXBUF; //if(rdata != sdata) error(); asm (" NOP"); ``` } } // spi frame data functions: //* void MR_reg () { sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x00; spi_xmit(sdata); sdata =0x04; spi_xmit(sdata); sdata = 0x10; spi_xmit(sdata); ``` } void GAR() { //ip address mac SUBR SHAR SIPR are set here ``` sdata = 0x00; spi_xmit(sdata); sdata = 0x01; spi_xmit(sdata); sdata = 0x04; spi_xmit(sdata); sdata = 0xC0; spi_xmit(sdata); sdata = 0xA8; spi_xmit(sdata); sdata = 0x00; spi_xmit(sdata); sdata = 0x01; spi_xmit(sdata); ``` } void SUBR() { ``` sdata = 0x00; spi_xmit(sdata); sdata = 0x05; spi_xmit(sdata); sdata = 0x04; spi_xmit(sdata); sdata = 0xFF; spi_xmit(sdata); sdata = 0xFF; spi_xmit(sdata); sdata = 0xFF; spi_xmit(sdata); sdata = 0x00; spi_xmit(sdata); ``` } void SHAR() { sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x09; spi_xmit(sdata); sdata = 0x04; spi_xmit(sdata); sdata = 0x00; spi_xmit(sdata); sdata = 0x08; spi_xmit(sdata); sdata = 0xDC; spi_xmit(sdata); sdata = 0x01; spi_xmit(sdata); sdata = 0x02; spi_xmit(sdata); sdata = 0x03; spi_xmit(sdata); } ``` void SIPR () { sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x0F; spi_xmit(sdata); sdata = 0x04; spi_xmit(sdata); sdata = 0xC0; spi_xmit(sdata); sdata = 0xA8; spi_xmit(sdata); sdata = 0x00; spi_xmit(sdata); sdata = 0x02; spi_xmit(sdata); ``` } //=========================================================================== // * void Sn_MR() { // Sn3_MR reg sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x00; spi_xmit(sdata); sdata = 0x04; spi_xmit(sdata); sdata = 0x01; spi_xmit(sdata); ``` } void Sn_PORT() { sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x04; spi_xmit(sdata); sdata = 0x0C; spi_xmit(sdata); sdata = 0x13; spi_xmit(sdata); sdata= 0x88; spi_xmit(sdata); ``` } void opencmd() { //Sn_CR reg sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x01; spi_xmit(sdata); sdata = 0x0C; spi_xmit(sdata); sdata = 0x01; spi_xmit(sdata); ``` } void Sn_DIPR() { //destination IP address sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x0C; spi_xmit(sdata); sdata = 0x0C; spi_xmit(sdata); sdata = 0xC0; spi_xmit(sdata); sdata = 0xC0; spi_xmit(sdata); sdata = 0xA8; spi_xmit(sdata); sdata = 0x00; spi_xmit(sdata); sdata = 0x0B; spi_xmit(sdata); ``` } void Sn_DPORT() { //destination port number sdata = 0x00; spi_xmit(sdata); ``` sdata= 0x10; spi_xmit(sdata); sdata = 0x0C; spi_xmit(sdata); sdata = 0x13; spi_xmit(sdata); sdata = 0x88; spi_xmit(sdata); ``` } void listencmd () // working in tcp server mode changed to TCP client mode listen chnaged to connect { //Sn_CR sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x01; spi_xmit(sdata); sdata = 0x0C; spi_xmit(sdata); sdata = 0x04; spi_xmit(sdata); ``` } //*** void txdata () { sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x00; spi_xmit(sdata); sdata = 0x14; spi_xmit(sdata); sdata = 0xAA; spi_xmit(sdata); sdata = 0xAA; spi_xmit(sdata); ``` } //* void sendcmd() { sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x01; spi_xmit(sdata); sdata = 0x0C; spi_xmit(sdata); sdata = 0x20; spi_xmit(sdata); ``` } // Step 7. Insert all local Interrupt Service Routines (ISRs) and functions here: void delay_loop() { long i; for (i = 0; i < 1000000; i++) {} } void error(void) { __asm(" ESTOP0"); // Test failed!! Stop! for (;;); } void spi_init() { SpiaRegs.SPICCR.all =0x0007; // Reset on, rising edge, 16-bit char bits SpiaRegs.SPICTL.all =0x0006; // Enable master mode, normal phase, // enable talk, and SPI int disabled. SpiaRegs.SPIBRR =0x007F; SpiaRegs.SPICCR.all =0x0097; // Relinquish SPI from Reset SpiaRegs.SPIPRI.bit.FREE = 1; // Set so breakpoints don’t disturb xmission } void spi_xmit(uint8 a) { SpiaRegs.SPITXBUF=a; } void spi_fifo_init() { // Initialize SPI FIFO registers SpiaRegs.SPIFFTX.all=0xE040; SpiaRegs.SPIFFRX.all=0x204f; SpiaRegs.SPIFFCT.all=0x0; } ### Reply 15 by soorajsuresh80, 2020-01-10 while reading PHY link am getting the value as link down this is the frame i used to read the phy link status void PHYCFGR() { sdata = 0x00; spi_xmit(sdata); ``` sdata = 0x2E; spi_xmit(sdata); sdata = 0x00; spi_xmit(sdata); ``` } ### Reply 16 by teddy, 2020-01-13 Hello Please tell me about the problem with the program. We can’t check all the codes. ### Reply 17 by soorajsuresh80, 2020-01-13 Hello Teddy, the spi communication is working fine as i read the version register value i got the correct value. but theTCP connection is not working. Also when i reads the PHYCFGR the link status bit shows as link down. ### Reply 18 by teddy, 2020-01-13 Hello If the SPI communication is fine, check hardware connected. 1. Check Lan cable connected PC or router. 2. Check the LED light of the Ethernet connector. 3. Check your schematic. check your Ethernet connector has a transformer. Thank you ### Reply 19 by soorajsuresh80, 2020-01-13 basically this is what i did , 1,Set MR reg value to 0x08; //for initializing the internal regs as per the datasgeet 2,wait for the MR reg to clear to 0x00 ; 3,Set IP MAC and GHAR; 4,Set Sn_MR value to 0x01; //TCP protocol 5,Set DPORT DIP ; 6; Issue open command 7,Delay 8Issue connect command. But the problem is that am stuck at step 2. MR reg is not clearing to 0x00 ### Reply 20 by Eugeny, 2020-01-14 ![](https://avatars.discourse-cdn.com/v4/letter/s/53a042/48.png) soorajsuresh80: > 1,Set MR reg value to 0x08; //for initializing the internal regs as per the datasgeet Why do you think bit 3 will clear itself? I suspect you must write 0x80 to software reset the chip, and not 0x08. ![](https://avatars.discourse-cdn.com/v4/letter/s/53a042/48.png) soorajsuresh80: > 7,Delay There must not be a delay, there must be a controlled loop instead to wait until CR clears (=command acceptted). ### Reply 21 by soorajsuresh80, 2020-01-17 Thanks Eugeny for the help, My mistake…, Actually i did write the value as 0x80 in the code. It was a mistake in my post. Even reading the version register is giving me wrong value. I don’t know whats happening. this is the frame i used to read the version register GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1; // clearing the SCSn to initiate transmission of data ``` sdata = 0x00; //address phase1 spi_xmit(sdata); sdata = 0x39; //address phase2 spi_xmit(sdata); sdata = 0x00; //Control phase spi_xmit(sdata); sdata = 0x00; spi_xmit(sdata); GpioDataRegs.GPBSET.bit.GPIO57 =1; // setting high the SCSn to end transmission of data ``` ### Reply 22 by soorajsuresh80, 2020-01-20 Reading the version register is giving me the values like 0x01FF . I don’t know whats going wrong in here. ### Reply 23 by soorajsuresh80, 2020-01-27 could someone please reply? I have been trying on this for 2 months ### Reply 24 by irina, 2020-01-29 (in reply to reply 23) Sorry for late reply. When you read the version register of W5500, it must be read the data as 0x04 because the version register is read-only. The first thing you do is check the right data of version register. If you don’t read the data as 0x04, SPI isn’t working. ### Reply 25 by soorajsuresh80, 2020-01-29 Thanks for the help, What could go wrong in here? I mean for reading the version register what all initialization is required? can you tell me that by a pseudo code ? ### Reply 26 by irina, 2020-01-30 The first thing you do is confirm the connection master and slave as below figure. ![image](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/d/d4475c6d5c62cb06af9f7da9418d5ddc162fb64f.png) The second thing you do is send the right W5500 SPI frame whether or not. irina_kim: > ![image](https://maker.wiznet.io/forum_uploads/wiznet/original/2X/6/6800e152ec4b1e6775dc205cfd99621e92051dd3.png) You have to set CSn as ‘0’ before SPI data send and if you sent all data, you have to set CSn as ‘1’. --- Source: https://maker.wiznet.io/forum/13623