---
title: "Polling of the Sn_SR register(s)"
url: "https://maker.wiznet.io/forum/10261"
markdown_url: "https://maker.wiznet.io/forum/10261/md"
type: "Forum topic"
category: "Ethernet Chips"
author: "Candela12"
created: "2014-05-23T17:23:03+09:00"
last_activity: "2017-05-04T08:33:00+09:00"
language: "en"
views: 486
replies: 0
source: "WIZnet Makers forum (https://maker.wiznet.io/forum/)"
---

# Polling of the Sn_SR register(s)

## Question

Asked by Candela12 on 2014-05-23 in Ethernet Chips.

We are in the process of evaluating the W5200 using the W5200 pictail plus module + hardware stack + dspic33e mcu.
We optimized/modified the provided sample code for the HW stack.
We added functionality to use the hw interrupt pin for notification of incoming data.
We use socket 0 (udp) for receiving data and socket 1 (udp) for outgoing data.

In the provided sample code we observe extensive polling of the Sn_SR register(s) in the mainloop.
We observe that the Sn_SR register of socket 0 always has the value of 22.

Questions:
Why is (extensive) polling of socket 0 Sn_SR needed?
Except from a socket close, which conditions can cause a (not wanted) change of Sn_SR state?

---

Source: https://maker.wiznet.io/forum/10261