---
title: "Remote Ethernet Data Transmission System based on Hardware Protocol Stack Chip"
url: "https://maker.wiznet.io/emimamanna/projects/remote-ethernet-data-transmission-system-based-on-hardware-protocol-stack-chip/"
markdown_url: "https://maker.wiznet.io/emimamanna/projects/remote-ethernet-data-transmission-system-based-on-hardware-protocol-stack-chip/md"
type: "UCC: User Created Content"
author: "emimamanna"
author_url: "https://maker.wiznet.io/emimamanna/"
original_author: "Liang Zhao"
original_url: "https://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.823.1736&rep=rep1&type=pdf"
published: "2022-09-20"
language: "en"
likes: 9
views: 1111
comments: 1
source: "WIZnet Makers (https://maker.wiznet.io/)"
---

# Remote Ethernet Data Transmission System based on Hardware Protocol Stack Chip

> This paper introduces a chip W5100 which is with network interface.

Original author: Liang Zhao (source: https://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.823.1736&rep=rep1&type=pdf)

## Article

I. INTRODUCTION

Data acquisition and transmission system has been a common concern issue in the field of industrial control, environmental parameter monitoring, building energy consumption monitoring, and other many relevant fields, especially for solving the remote data transmission problems [1-5]. The traditional fieldbus communication modes are only suitable for short range due to the limitation of its transmission distance. However, GPRS (General Packet Radio Service) could offer a wireless method, which is not restricted by the communication distance. In paper [1], the researchers use GPRS technology to transmit data of mobile objects, which can automatic detect and transmit data for constructing an intelligent traffic monitoring system. But, the application of this method is not wide, because the cost of this process is expensive, especial for large number of data transmission [6]. A microcontroller-based multi-sensor was presented in paper [2], which is able to measure different quantities used to characterize water quality and to disseminate data over the Internet. Besides that, cabled internet communication is selected in paper [3~5] in order to realize data transmit in monitoring system. At present, the data transmission system based on Ethernet is applied in more and more monitoring fields because of its low costs, easy maintenance and high data transfer speed. The most common network driver chips include RTL8019 [7], CS8900 [8], ENC28J60 [9], DM9000 [10], and W5100 [4, 11]. Among these chips, ENC28J60 supports SPI serial interface communication mode, and the hardware circuit design is relatively easier. RTL8019, CS8900 and DM9000 are parallel bus driving mode, which is needed to connect more data and address pins so as to add the design complexity and printed circuit board area. The chip W5100 not only supports the SPI serial interface, but also the parallel bus mode. Besides that, the other chips, except for W5100, require the users to develop software program of TCP protocol stack, which will occupy a lot of storage space and RAM memory. In addition, the stability and reliability of software realization method are worse compared to the hardware integration method. The feature comparison of these network chips is shown as in Table I.

TABLE I.  PERFORMANCE COMPARISON OF NETWORK CHIPS* *

| Chip | Interface | Speed | Protocol stack |
| --- | --- | --- | --- |
| RTL8019 | Parallel bus | 10M | Software program |
| CS8900 | Parallel bus | 10M | Software program |
| DM9000 | Parallel bus | 100M | Software program |
| ENC28J60 | SPI | 10M | Software program |
| W5100 | SPI/Parallel bus | 10M/100M | Hardwire integrated |

This paper proposes an easy way to achieve Ethernet communication by using W5100 chip, which integrates 10/100M Ethernet controller and hardware TCP/IP protocol stack inside. This paper is organized as follows. The data transmission system overview is introduced in Section II, which is consists of hardware and software design for W5100 chip. Section III is an application case for W5100 in building energy consumption monitoring system, which includes the MAC address binding, resuming send program and network configuration. The results are presented in Section IV. Finally, we make the conclusion in Section V.

II. SYSTEM OVERVIEW

W5100 is a new multifunctional monolithic network interface chip, made in South Korea Wiznet company, with internal integrated 10/100M Ethernet controller, and hardware TCP/IP protocol stack, provides full-duplex Ethernet solutions [12]. W5100 supports TCP, UDP, ICMP, ARP, IGMP and PPPOE. The internal block diagram shows in Figure1. It can satisfy the needs of different network situations. These properties make the program developer does not need to consider Ethernet TCP/IP protocol stack transplantation and complex software drivers, carry out the network communication function just like access external memory. The features of W5100 as follows:

1. Support Hardwired TCP/IP Protocols TCP, UDP, ICMP, IPv4 ARP, IGMP, PPPoE, Ethernet.

2. Embedded 10BaseT/100BaseTX Ethernet PHY interface.

3. Support ADSL connection (with support PPPoE Protocol with PAP/CHAP Authentication mode)

4. Supports 4 independent sockets communication simultaneously

5. Internal 16Kbytes Memory for Tx/Rx Buffers

6. Support Serial Peripheral Interface, Multifunction LED outputs (TX, RX, Full/Half duplex, Collision, Link,

Speed)

![](https://maker.wiznet.io/upload/ckeditor5/84402227%5F1663700013%2Ejpeg)

Figure 1.   Block diagram of internal W5100.

The core processor of this paper is STM32F103VET6, which is based on the Cortex-M3 kernel. It is internal integration of the 512k FLASH program storage space and 64k SRAM data storage space. The maximum working frequency of STM32 is 72MHz, and it contains plentiful peripheral interfaces, including two 12 digital to analog converter, 7 timers, CAN bus interface, SPI communication interface, and 3 USART serial communication interfaces [13]. Figure2 shows the structure of data transmission system based on STM32 and W5100, which includes power supply circuit module, real-time clock module, Watchdog reset circuit module, which plays a role of anti-interference in working process so that the reliability of system is greatly enhanced, JTAG debugging circuit and W5100 Ethernet communication module.

Figure 2.   System structure diagram.

## A. Hardware Design

In this paper, the processor STM32 connects W5100 through SPI serial interface mode for communication, the hardware circuit is as shown in figure3. The chip in the left side is W5100, while on the right side is the RJ45 interface module, 13F60FGYDPNW2, which is integrated network transformer and LED indicators. The communication and control pins of W5100 connect STM32 respectively, including INT pin, which is an interrupt pin and connects to PC4 pin (external interrupt pin) of STM32. When W5100 changes states, such as establishing the connection to the server or finish sending data, this pin will produce a jump from high level to low level, and then triggering an interrupt. The RST_BG pin needs to connect a 12.3kΩ resistance to the ground, however, there is no nominal 12.3kΩ, here, a connecting

of 12kΩ resistance and 300Ω resistance is adopted to realize it. In order to enable SPI communication function, the SEN pin must set high level, and this pin is controlled by a GPIO of STM32.

Network transmission module is a critical component in data transmitting system. Due to the W5100 working frequency is high to 100 MHz, there are some announcements in the process of circuit designing in order to guarantee the safety and reliability of the system.

1. The distance between the RJ45 network transformer and W5100 should be as close as possible.

2. Two termination matched resistances are placed as closer as to the network of module transformer.

3. Placement of crystals is away from the transformer and circuit line of TX and RX, and the line as shorter as better, avoiding high frequency disturbance, the length of TX and RX lines should be less than 12cm, with the width more than 8mil.

4. The digital ground and analog ground must be isolated though magnetic bead, with decoupling capacitor next to the 3.3v power.

## B. Software Design

The software program design of W5100 includes the initialization and Socket drive two parts, the initialization process mainly to configure the chip internal registers to realize chip reset, sending and receiving buffer setting.

The initialization registers mainly is shown as in Table II:

| ![](https://maker.wiznet.io/upload/ckeditor5/84402227%5F1663700013%5F0%2Ejpeg) Figure 3. Circuit of hardware. |
| --- |

TABLE II.   REGISTERS CONFIGURATION OF W5100

| Registers | Setting | Description |
| --- | --- | --- |
| TMSR | 0xAA | 4kB send buffer |
| RMSR | 0xAA | 4kB receive buffer |
| RTR | 0x07D0 | Re-send time 200ms |
| RCR | 8 | Re-send counters |
| IMR | 0xC3 | Enable interrupt |

1. RMSR (Receive Buffer Register) and TMSR (Send Buffer Register) are setting to 0xAA (default is 0x55), here, the system only uses the Socket0 and Socket1 two Sockets, so the buffers are setting to 4kB, increases the sending and receiving buffer space.

2. RTR (Retransmission Time Register) in accordance with the default settings, namely 200ms (0x07d0), when W5100 sends a connection or disconnect command, but has not received the other's response in 200ms, the W5100 will triggers re-transmission mechanism automatically.

3. RCR (Repeat Count Register) is setting to 8 times.

4. IMR (Interrupt Mask Register), writing 1 to the corresponding bit will make enable of the interrupt source, and the bits of interrupt mask register is shown as in Table III, in this system, the bit 7,6,1,0 should be make enable, so the IMR register is set 0xc3. The STM32 processor can access the IR register to find out the interrupt source, and then go to handle the corresponding interrupt procedures.

TABLE III.  BITS OF INTERRUPT MASK REGISTER

| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| --- | --- | --- | --- | --- | --- | --- | --- |
| Conflict | Unreach | PPPoE | - | S3_int | S2_int | S1_int | S0_int |

Figure 4.  Flowchart of client mode.

The W5100 provides TCP and UDP two kinds of communication modes, however, the TCP is a connection-oriented Ethernet communication method compared to the UDP mode, and provides a more reliable communication service [14]. In this paper, the W5100 works as a TCP client, the work flow is as shown in Figure3. The collector firstly sends a request command to server and to build a new connection, once the connection is established successfully, the server will send a configuration file down to the collector. Then, the collector begins to acquire energy consumption data and save the data into SD card. However, when encounters the network congestion, the W5100 will produce a timeout flag or no response. Then the server turns off the current connection link and closes Socket port so as to the collector can build a new network connection.

III. APPLICATION CASE

## A. MAC Address Binding

MAC address is an only identification of W5100, which is consists of six bytes of hexadecimal fields (48bits), such as 78:E4:00:35:04:2A, with separated by a colon. Each W5100 chip owns a separate MAC address. However, there is no MAC address in W5100 default configuration, and it is needed to be configured by STM32 processor after the system running. Now, it is encountering a problem that how to program flash of STM32. The versions of program downloaded to STM32 processor may be different due to the different MAC addresses for W5100, which would cause a series of potential problems especially when program updates or changing data collector.

In this paper, we solve this problem easily by using FLASH in STM32 as MAC address storage space. The special method of this process is programming MAC address information into STM32 first in a fixed address, and then re-programming the final release version into STM32. When data collector begins to work, STM32 read the MAC address from FLASH and configure it to W5100.

## B. Resuming Send Program

Although TCP offers reliable service [15], the data transfer between data collector and server encounters network interruption unavoidable. When this happens, the data should be stored in a large capacity memory card. The processor calls resuming send program to retransmitting data to server in order when the network returns to normal. The arithmetic of resuming send program is determined by two counters, send_cnt and sended_cnt.

Send_cnt, here, used to count sequence number of packet at the present moment, which is calculated as equation (1).

send_cnt= (t_TD 1 *24*60+t_TH*60+t_TM－ ) +1 (1)

P_T

where, t_TD, t_TH and t_TM are date, hour and minute of that moment respectively, and P_T is data packet sending period, range from 5 minutes to 30 minutes. The purpose of plus one in the end of equation (1) is to record the sequence of packet from one not zero. For example, setting the P_T is 5 minutes, and the serial number of first packet on five minutes past zero o’clock, 1 January is: send_cnt=((1－1 *24*60+0*60+5 /5+1=1) ) (2)

The number of packets in one day is:

*N*D=24*60/5 = 288 (3)

So the number of packets in one month is:

*N*M=31*288=8928 (4)

On the other hand, the sended_cnt used to express the number of packet that the server has received succeed. While the maximum of packets in one month is 8928, so it can be recorded by two 8b counter variables, which are stored in EEPROM AT24C02 without losing when the system lost power. The arithmetic flow chart of resuming send program is shown as in Figure 5.

Figure 5.   Flow chart of data packet transmission.

First, the processor starts calculate the value of send_cnt after receive time synchronization packet, and then reads sended_cnt value from EEPROM to make a comparison. STM32 goes into normal send program if the value of sended_cnt less than the value of send_cnt, otherwise, calls resuming send program until sended_cnt catching up with send_cnt.

## C. Data Collector Configuration

There are some configuration steps to do before the data collector begins to work, which is shown as in Figure6. The configuration consists of two parts, one is for the collector, which contains the IP address, port, gateway, Building_ID and Gateway_ID, while the other is for the server, includes IP address and port. The IP address and gateway address of collector should be provided by network administrator in the monitored building. However, the IP address and port of server are fixed address, which are saved in collector. The collector will send a connection to this port when it starts to work. The Building_ID and Gateway_ID are the identity of target building and collector respectively. The filed in the last line of the configuration ‘local_set’ is an end flag, when the processor receives ‘local_set’, it starts to extract the configuration information and save it into EPROM storage.

![](https://maker.wiznet.io/upload/ckeditor5/84402227%5F1663700014%2Ejpeg) Figure 6.  Configuration of data collector.

## D. Communication Protocol

The communication protocol frame format between data collector and server is as shown in Figure7, which is consists of four parts. In the first is file type, includes identification packet, configuration packet, heart packet, timing packet, data packet, error packet and ACK packets for data packet and error packet, the detailed description of these packets is as shown in Table IV. Next is ID information, which contains 10 bits of building ID, 2 bits of collector ID, 14 bits of time information and 1 bit of packet abbreviation (V, T, D, E). In the third position is size of packet file and XML file is in the end.

Figure 7.  Frame format between collector and server

TABLE IV.  CLASSIFICATION OF DATA PACKET

| Packet Type | Sender | Receiver | Packet Size | Period |
| --- | --- | --- | --- | --- |
| Identification Packet | collector | Server | Fixed | Once |
| Configuration Packet | Server | collector | Variation | Once |
| Heart Packet | collector | Server | Fixed | 1 Minute |
| Timing Packet | Server | collector | Fixed | 1 Minute |
| Data Packet | collector | Server | Variation | 5~60 Minutes |
| Data ACK | Server | collector | Fixed | 5~60 Minutes |
| Error Packet | collector | Server | Variation | Random |
| Error ACK | Server | collector | Fixed | Random |

IV. RESULT AND DISSCUSSION

At present, the collector has been used in building energy consumption monitoring platform in Liaoning province in China and in superintend platform of economical campus for Taiyuan University of technology. It is clearly that electrical energy is mainly consumed during working hours between 7:00 AM to 17:00 PM. There are 56 data collectors and 1580 electric meters in Liaoning project, on the other hand, 80 data collectors and 299 electric meters, 241 water meters in Taiyuan project. Two years continuous running shows that the data transmission system is reliable and stable.

Figure 8.(a)~(d) show the energy consumption in some building in real-time.

Figure 8.(a), (b), (c) display the electrical energy quantity consumption, water energy quantity consumption and heat energy quantity consumption, respectively. It is can be clearly observed that, the power consumption goes up rapidly around from 7:00 a.m., the maximum value is shown in 8:00 a.m. and 1:00 p.m., a reduction of the load demand starts after 18:00. Besides that, the energy consumption on the weekend become lower compared to the workday.

Figure8.(d) describes the power factor of a branch, which is a main parameter to judge the quality of electric power system. The value of power factor is almost above 0.96, which indicates the system is on good work condition.

![](https://maker.wiznet.io/upload/ckeditor5/84402227%5F1663700014%2Epng)

1. Electric consumption

![](https://maker.wiznet.io/upload/ckeditor5/84402227%5F1663700014%5F0%2Epng)

1. Water consumption

![](https://maker.wiznet.io/upload/ckeditor5/84402227%5F1663700014%5F1%2Epng)

1. Heat consumption

![](https://maker.wiznet.io/upload/ckeditor5/84402227%5F1663700014%5F2%2Epng)

Time：0~23（ h）

1. Power factor

Figure 8.  Data from building energy consumption monitoring system

V. CONCLUSION

This paper develops a low-cost, small sized, data transmission system based on the STM32 processor and W5100 network control chip. The W5100 has a high level of integration and short development cycle advantages. The actual project operation results show that the system is reliable and steady. At present, implementing energy-saving construction, the development of green buildings, achieving sustainable development has become a consensus in China, but more widely, the globe. The collector will have a good market prospects in the area of monitoring system in future.

ACKNOWLEDGMENT

This research was supported by the National Natural Science Foundation of China (Grant No. 51008042, No. 51078053);The Key Projects in the National Science & Technology Program in the Twelfth Five-year Plan Period of China (Grant No.2011BAJ03B123);The Fundamental Research Funds for the Central Universities of China (No.DUT11ZD105).

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Source: https://maker.wiznet.io/emimamanna/projects/remote-ethernet-data-transmission-system-based-on-hardware-protocol-stack-chip/
