---
title: "ARC: Building Deterministic Ethernet Applications with ESP32-S3 and W5500 MACRAW"
url: "https://maker.wiznet.io/bruno/projects/arc/"
markdown_url: "https://maker.wiznet.io/bruno/projects/arc/md"
type: "UCC: User Created Content"
author: "Dhimas Ardinata"
author_url: "https://github.com/dhimasardinata/arc"
editor: "WIZnet"
editor_url: "https://maker.wiznet.io/"
original_author: "Dhimas Ardinata"
original_url: "https://github.com/dhimasardinata/arc"
published: "2026-10-26"
language: "en"
likes: 0
views: 9
comments: 0
source: "WIZnet Makers (https://maker.wiznet.io/)"
---

# ARC: Building Deterministic Ethernet Applications with ESP32-S3 and W5500 MACRAW

> Explore low-level Ethernet frame processing, predictable memory management, and security-oriented firmware development using the WIZnet W5500.

Original author: Dhimas Ardinata (source: https://github.com/dhimasardinata/arc)

## Article

## Arc: Deterministic ESP32-S3 Firmware with W5500 Raw Ethernet Building Blocks

**Explore predictable embedded firmware design, bounded Ethernet frame buffering, and low-level W5500 MACRAW integration in an ESP-IDF project.Original Developer:** Dhimas Ardinata Putra Pamungkas
**Project:** [GitHub Repository](https://github.com/dhimasardinata/arc)
**Documentation:** [Official Arc Documentation](https://dhimasardinata.github.io/arc/)
**Developer:** [Dhimas Ardinata's Portfolio](https://dhimasardinata.netlify.app/)

### Overview

Many embedded projects begin with sensors, microcontrollers, and network communication. As the system becomes more complex, firmware developers must also consider how tasks share CPU time, how data moves between peripherals, and how network traffic is buffered.

**Arc**, created by embedded and IoT developer **Dhimas Ardinata**, is an open-source C++ firmware foundation built on Espressif's **ESP-IDF**, primarily targeting the **ESP32-S3**.

Its design emphasizes explicit resource ownership, static or caller-managed memory in time-critical paths, and separation of control and networking tasks from deterministic computation.

For WIZnet developers, one particularly interesting part of Arc is its support for **W5500-oriented raw Ethernet building blocks**.

Instead of using the W5500 only as a conventional hardware TCP/IP socket controller, Arc explores how raw Layer 2 Ethernet frames can become part of a carefully controlled embedded data path.

### What Makes Arc Different?

Arc is designed for embedded developers who need greater control over hardware resources, task execution, and memory usage.

In its typical ESP32-S3 architecture, responsibilities are divided between two CPU cores:

**Core 0:** Networking, storage, logging, and system services.

**Core 1:** Time-sensitive computation and GPIO operations.

This separation helps developers organize communication workloads independently from timing-sensitive application logic.

Arc also provides typed resource interfaces, bounded queues, DMA/cache management utilities, and reusable networking components.

The objective is predictable firmware behavior, although actual execution timing must still be verified on target hardware.

### WIZnet W5500 Integration

The WIZnet W5500 is an SPI Ethernet controller with an integrated 10/100 Ethernet MAC and PHY, hardware TCP/IP processing capabilities, and support for MACRAW communication.

Arc explores the W5500's **MACRAW capability**, which allows applications to work with Ethernet frames below the conventional TCP/IP socket abstraction.

Two software components are particularly relevant.

#### 1. W5500Raw: Raw Ethernet Interface

The `arc::net::W5500Raw` component provides a compact software interface for W5500-oriented Ethernet frame handling.

Its current implementation includes:

W5500-style SPI transaction headers.

A `send()` function delegating transmission to a developer-provided SPI policy.

An `ingest()` function for accepting frames supplied by the application.

Integration with a fixed-capacity Ethernet ring buffer.

This is a useful starting point for building custom Ethernet communication software.

However, the component is **not a complete, ready-to-use W5500 hardware driver**. W5500 initialization, hardware frame reception, interrupt handling, and board-specific SPI integration remain the developer's responsibility.

**Source:** [arc/w5500.hpp](https://github.com/dhimasardinata/arc/blob/main/components/arc/include/arc/w5500.hpp)

#### 2. EthernetRing: Predictable Frame Buffering

Arc's `arc::net::EthernetRing` component provides bounded storage for raw Ethernet frames.

Rather than allocating memory dynamically whenever new frames arrive, the ring buffer uses a predefined capacity.

This approach offers several advantages:

Predictable memory requirements.

Explicit limits on stored frames.

Easier reasoning about resource ownership.

A foundation for application-defined overflow handling.

For embedded systems, bounded memory use can be valuable when networking operates alongside sensor acquisition or control tasks.

The default `W5500Raw` template uses a 1536-byte frame capacity and a queue capacity of four entries. These are software template defaults, not measured Ethernet performance characteristics.

**Source:** [arc/ethernet.hpp](https://github.com/dhimasardinata/arc/blob/main/components/arc/include/arc/ethernet.hpp)

![이미지 미리 보기](https://maker.wiznet.io/upload/ckeditor5/e51bf23b761345159c35941f12c98850.png)

### How W5500 Fits into the Architecture

A potential Arc-based Ethernet application consists of an external W5500 module connected to an ESP32-S3 through SPI.

The W5500 provides the physical Ethernet interface and MACRAW functionality.

The developer supplies hardware initialization, SPI transactions, and receive handling. Arc's W5500Raw and EthernetRing components then provide reusable software building blocks for passing frames into application-specific processing.

The application can use these frames for protocol analysis, custom communication, or specialized network diagnostics.

**Important:** This MACRAW approach is different from using the W5500 hardware TCP/IP socket engine for TCP or UDP offloading.

### Potential Applications

#### Industrial Ethernet Diagnostics

Developers can build specialized diagnostic tools that inspect Ethernet frames relevant to industrial devices and communication protocols.

#### Network Monitoring

Arc's raw Ethernet components provide a foundation for collecting selected network information or inspecting application-specific traffic.

Monitoring visibility depends on the network topology. Capturing traffic between unrelated devices may require switch port mirroring or dedicated network tap hardware.

#### Custom Layer 2 Protocols

Raw frame access can support experimental Ethernet protocols without requiring developers to use conventional TCP/IP sockets.

#### Security-Oriented IoT Research

Developers can experiment with frame validation, filtering policies, or anomaly indicators implemented in ESP32-S3 firmware.

These are potential applications rather than completed security products included with Arc.

### Security Capabilities and Responsibilities

Arc includes additional software interfaces for security-related operations, including cryptographic functions, TLS networking, and firmware lifecycle management.

These capabilities depend on the ESP32 platform, ESP-IDF, and application-specific implementation.

**The W5500 itself is not a cryptographic security processor.**

In a security-oriented system, the W5500 supplies Ethernet connectivity, while the host processor and firmware implement authentication, encryption, network policies, and other security controls.

A production security device would require further development, threat modeling, and hardware validation.

### Meet the Developer: Dhimas Ardinata

**Dhimas Ardinata Putra Pamungkas** is an embedded and IoT developer with experience in C/C++ firmware, ESP32 and ESP8266 platforms, sensor integration, industrial communication, and field validation.

His [personal portfolio](https://dhimasardinata.netlify.app/) highlights several practical IoT projects.

#### ATOMIC: Orchid Greenhouse Monitoring and Control

ATOMIC is an IoT-based greenhouse monitoring and control project connecting multiple ESP8266 sensor nodes with ESP32 gateways.

The system combines environmental sensing, equipment control, communication recovery, local data caching, and remote monitoring.

The project illustrates the developer's experience with distributed sensing and practical field deployment.

#### MONIK: Hydroponic Monitoring and Control

MONIK focuses on monitoring hydroponic conditions, including nutrient solution measurements and environmental data.

It also incorporates control firmware for pumps and other equipment.

The project demonstrates the integration of embedded sensors, actuators, communication, and operational safeguards.

#### IMONIK: Industrial Hydroponic Monitoring

IMONIK involves ESP32-based monitoring and control using industrial communication technologies such as RS485 and Modbus RTU.

The work includes communication testing, sensor integration, device diagnostics, and firmware development.

#### Open-Source Contributions

Beyond these field projects, Dhimas has also contributed networking-related fixes to Arduino-ESP32 and developed other open-source firmware libraries.

These experiences help explain Arc's focus on explicit resource handling, communication reliability, and maintainable embedded software.

**Note:** The portfolio projects described above are examples of the developer's broader engineering experience. They are not presented as verified Arc or W5500 deployments.

Visit the developer's portfolio for project descriptions, photographs, and source links:

[**https://dhimasardinata.netlify.app/**](https://dhimasardinata.netlify.app/)

### Getting Started

Developers interested in Arc can begin with the official project documentation.

The documentation provides architecture explanations, setup instructions, module references, and example ESP32-S3 firmware projects.

The UDP example is a useful entry point for understanding Arc's Core 0/Core 1 programming model.

Developers specifically interested in W5500 should then review the `W5500Raw` and `EthernetRing` headers and implement the required hardware-specific SPI and MACRAW handling.

#### Useful Resources

**GitHub:** <https://github.com/dhimasardinata/arc>

**Official Documentation:** <https://dhimasardinata.github.io/arc/>

**Developer Portfolio:** <https://dhimasardinata.netlify.app/>

**W5500 Software Component:** <https://github.com/dhimasardinata/arc/blob/main/components/arc/include/arc/w5500.hpp>

**Ethernet Buffer Component:** <https://github.com/dhimasardinata/arc/blob/main/components/arc/include/arc/ethernet.hpp>

**Examples:** <https://dhimasardinata.github.io/arc/examples>

**W5500 Product Documentation:** <https://docs.wiznet.io/Product/Chip/Ethernet/W5500>

**Licensing:** Arc is distributed under AGPL-3.0-only. A separate commercial licensing arrangement is described by the author. Developers should review the applicable terms before integrating the project into proprietary firmware.

### Conclusion

Arc demonstrates an interesting approach to embedded firmware development through explicit resource management, bounded memory use, and separation of networking tasks from time-sensitive computation.

Its **W5500Raw** and **EthernetRing** components illustrate how the WIZnet W5500's MACRAW capability can become part of a custom Ethernet frame-processing architecture.

For the WIZnet maker community, Arc provides a useful reference for exploring Ethernet beyond conventional TCP/IP socket applications.

Combined with the developer's practical IoT experience and publicly available technical documentation, the project offers an opportunity to study low-level embedded Ethernet design and build new applications around the W5500.

*This article describes publicly available software components and potential applications. It does not imply that a complete W5500-based monitoring or security product has been independently validated.*

---

Source: https://maker.wiznet.io/bruno/projects/arc/
