--- title: "Introducing the STM32H5 + W6300 High-Speed Ethernet Board(Including Ref.)" url: "https://maker.wiznet.io/TheoIm/projects/introducing-the-stm32h5-w6300-high-speed-ethernet-board/" markdown_url: "https://maker.wiznet.io/TheoIm/projects/introducing-the-stm32h5-w6300-high-speed-ethernet-board/md" type: "UCC: User Created Content" author: "higenis" author_url: "https://m.blog.naver.com/chandong83/224047923087?referrerCode=1" editor: "WIZnet" editor_url: "https://maker.wiznet.io/" original_author: "higenis" original_url: "https://m.blog.naver.com/chandong83/224047923087?referrerCode=1" published: "2025-11-17" language: "en" likes: 0 views: 846 comments: 0 source: "WIZnet Makers (https://maker.wiznet.io/)" --- # Introducing the STM32H5 + W6300 High-Speed Ethernet Board(Including Ref.) > A high-speed STM32H562 + W6300 QSPI reference board featuring 1MB Flash, 640KB RAM, RTC support, and hardware TCP/IP for fast, secure Ethernet applications. Original author: higenis (source: https://m.blog.naver.com/chandong83/224047923087?referrerCode=1) ## Article [Hi genius](https://blog.naver.com/chandong83) recently unveiled their **STM32H562RG + W6300 development board**, a unique project combining hardware personally designed by the company’s CEO and software bring-up performed by the well-known maker [**BARAM**](https://blog.naver.com/chcbaram)** - **[**BARAM's VerificationPosting**](https://blog.naver.com/chcbaram/224053633262?trackingCode=blog_bloghome_searchlist)**.** What makes this board truly valuable is that it finally provides a **real, working reference design** showing the W6300 connected to the STM32H5 via QSPI—a concrete implementation that many makers and engineers have long been looking for. This curated post includes: - **Verified source code**, - **Prototype hardware reference**, - **A summary of all bring-up findings and key issues,** allowing you to skip hours of searching and instead start immediately with a **compact, practical one-page reference**. --- ## 1. MCU: STM32H562RG Core Specifications The board features the **STM32H562RGT6**, a flagship chip from the STM32H5 family designed for secure, high-performance embedded applications. [![](https://maker.wiznet.io/upload/ckeditor5/183849667%5F1763385146%2Epng)](https://www.mouser.kr/ProductDetail/STMicroelectronics/STM32H562RGV6?qs=amGC7iS6iy8v78b4U9ZX6w%3D%3D&srsltid=AfmBOooiBd0QxDxGkcjGsynRJfF5qPww9hzjei2xo0ACOAIg40yKWT45) ![](https://maker.wiznet.io/upload/ckeditor5/392965497%5F1763974288%2Epng) ### ✅ Key Features | Specification | Details | | --- | --- | | **Flash Memory** | 1MB | | **SRAM** | 640KB — ideal for buffering images or network packets | | **Core** | 250MHz Arm Cortex-M33 with TrustZone | | **Interfaces** | QSPI, USB, CAN, ADC/DAC, FMC, and more | | **Real-Time Clock** | Built-in RTC with dedicated 32.768kHz crystal | | **Backup Power** | VBAT connector for RTC battery backup | The generous SRAM capacity and high-speed QSPI interface make this MCU an excellent match for demanding networking applications with the W6300. --- ## 2. Ethernet Engine: W6300 (QSPI Mode) The **W6300** serves as the main communication chip on this board, connected via **High-Speed QSPI** for rapid data transfer between the MCU and Ethernet engine. ![](https://maker.wiznet.io/upload/ckeditor5/183849667%5F1763385179%2Epng) ### ✅ Standout Features - **Hardware TCP/IP Stack**: TCP, UDP, IPv4/IPv6, ICMPv6, IGMP, ARP, PPPoE - **Eight Independent Sockets**: Each with 64KB memory allocation - **QSPI Host Interface**: Supports Mode 0/3 - **Internal Buffer**: 32KB TX/RX buffer - **Integrated PHY**: 10/100M Ethernet PHY built-in - **Dual-Stack Support**: IPv4/IPv6 compatible - **Power Management**: Wake-on-LAN, power-down modes - **Voltage Flexibility**: 3V operation with 5V I/O tolerance This architecture allows the MCU to focus on application logic while the W6300 handles all networking tasks—an optimal division of labor for performance. --- ## 3. STM32H5-W6300 Prototype Board Overview ![](https://maker.wiznet.io/upload/ckeditor5/183849667%5F1763385219%2Epng) ### [**STM32H5 + W6300 HW REF(schematic)**](https://m.blog.naver.com/chandong83/224039436482?referrerCode=1) ### 🧩 Board Summary This prototype board combines the STM32H563 MCU with the WIZnet W6300 Ethernet controller, designed for applications that require **high-performance networking, security, and real-time processing**. **MCU:** STM32H563 (Cortex-M33, TrustZone, 640KB SRAM) **Ethernet:** W6300 (Hardware TCP/IP, 32KB Packet Memory, QSPI Interface) **Clock:** HSE 8MHz, W6300 requires 25MHz Crystal **Interfaces:** SWD, USART1, QSPI, GPIO, etc. This architecture delivers a **balanced and practical platform** that supports secure, high-throughput embedded networking—ideal for fast prototyping and product development. --- ### 📌 Prototype Notes Key issues discovered during early bring-up of the prototype board: **MCU Change:** STM32H563RGT → STM32H563RIT (pin-compatible, partially FW incompatible) **USART1 RX/TX Swapped:** Incorrect routing → can be fixed through firmware pin-swap feature **HSE Clock Mismatch:** Schematic shows 25MHz, but actual board uses 8MHz → firmware adjustment required **LSE Initialization Failure:** Likely due to missing or different component **W6300 Crystal Issue:** 12MHz mounted instead of 25MHz → replaced with correct 25MHz crystal These issues are typical for early prototype hardware and may be corrected in a production version. --- ### 🔍 Why STM32H5 + W6300 Is a Powerful Combination ### 🚀 1) High-Speed Data Transfers via QSPI The STM32H5's QSPI interface enables burst-mode and DMA-driven transfers to the W6300, supporting: - Real-time streaming applications - Low-latency control systems - Continuous high-throughput networking ### 💾 2) Large MCU SRAM + Dedicated W6300 Packet Memory **640KB MCU RAM + 32KB Ethernet buffer** makes this platform suitable for: - Camera streaming - Sensor fusion applications - Edge computing tasks - Packet-intensive applications ![](https://maker.wiznet.io/upload/ckeditor5/183849667%5F1763385254%2Epng) --- ## 4. Board Hardware Architecture & Pin Configuration ### [Github Source Code](https://github.com/chcbaram/stm32h5-w6300) ### 📌 QSPI Connections (MCU → W6300) | Signal | MCU Pin | | --- | --- | | QSPI_CLK | PA2 | | QSPI_CS | PB10 | | QSPI_D0 | PB8 | | QSPI_D1 | PB9 | | QSPI_D2 | PC2 | | QSPI_D3 | PC3 | This full **4-line QSPI interface** enables maximum bandwidth between devices. ### 🎛️ Control Pins - **W6300_RST**: PC0 (Reset) - **W6300_INT**: PC1 (Interrupt) ### ⏰ Clocking System - **32.768kHz crystal**: RTC operation (PC14, PC15) - **25MHz crystal**: W6300 Ethernet PHY ### 🔋 VBAT System - External battery connector for RTC backup - Ideal for low-power or timestamp-critical applications ### 🔌 Expansion Capability The board exposes most remaining STM32H5 pins, providing flexibility for various maker projects and custom extensions. --- ## Conclusion This development board offers more than just a product—it's a **ready-to-use reference design** that bridges the gap between datasheets and real-world implementation. Whether you're building industrial IoT devices, networked sensors, or high-performance embedded systems, this STM32H562 + W6300 combination provides a solid foundation with proven hardware and community-backed software support. --- Source: https://maker.wiznet.io/TheoIm/projects/introducing-the-stm32h5-w6300-high-speed-ethernet-board/