FYD Open Source Hardware – W5500 Ethernet Module
USR-ES1 embedded W5500 chip, transmits a logic gate Wiznet TCP / IP protocol stack, for a hardware implementation using layer and a network layer (: a TCP, UDP, ICMP, IPv4, ARP, IGMP, pppoe protocol), integrated data link, physical , cache data transceiver 32 thousand bytes as chip RAM. Create a master PC chips, just bear TCP / IP application layer control information processing tasks. Therefore, the load PC data replication, protocol processing, and the interrupt handling, such as increased system utilization and reliability.
Operation, the user W5500 MCU peripheral RAM, very easy to use as the rough. W5500 General High-speed external interfaces 80 million hertz SPI, another platform extension, select Fast Ethernet solutions. Auto-negotiation LED status display high-speed SPI interface stability.
Wiznet official size and pin compatible modules WIZ820io
Note: This module does SPI-Ethernet transparent transmission module requires an external MCU, I kid you not understand using W5500 chip. STM32 provides examples.
source : https://ko.aliexpress.com/item/W5500-Ethernet-module-over-the-SPI-interface-module-W5100-W5200-nontransparent-send-routine/32476595935.html
Tags : VAR, W5500
Author : FYD Open Source Hardware